Andrzej Warzyński 2826924543

[CIR][AArch64] Add support for the remaining vceqz builtins (#185440) ...

Implement the remaining CIR lowerings for the AdvSIMD (Neon)
`vceqz` intrinsic group (bitwise equal to zero).

Most variants of `vceqz` variant were already supported; this patch
completes the rest of the group [1] that was left as a TODO.

Tests for these intrinsics are moved from:
  * test/CodeGen/AArch64/neon_intrinsics.c
  * test/CodeGen/AArch64/v8.2a-fp16-intrinsics.c

to:
  * test/CodeGen/AArch64/neon/intrinsics.c
  * test/CodeGen/AArch64/neon/fullfp16,

respectively.

The implementation largely mirrors the existing lowering in
CodeGen/TargetBuiltins/ARM.cpp.

Reference:
[1] https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#bitwise-equal-to-zero

2026-03-10 12:58:06 +00:00

..

AMDGPU.cpp

clang/AMDGPU: Fix workgroup size builtins for nonuniform work group sizes (#185098)

2026-03-09 11:47:49 +01:00

ARM.cpp

[CIR][AArch64] Add support for the remaining vceqz builtins (#185440)

2026-03-10 12:58:06 +00:00

DirectX.cpp

[DirectX] Use scalar arguments for @llvm.dx.dot intrinsics (#134570)

2025-04-14 10:34:15 -07:00

Hexagon.cpp

…

NVPTX.cpp

[clang][NVPTX] Add missing half-precision add/mul/fma intrinsics (#170079)

2026-01-20 17:56:55 +05:30

PPC.cpp

[PowerPC] Add AMO load with Compare and Swap Not Equal (#178061)

2026-03-09 13:50:08 -04:00

RISCV.cpp

[RISCV] Replace riscv.clmul intrinsic with llvm.clmul (#178092)

2026-01-26 21:12:48 -08:00

SPIR.cpp

[SPIR-V] Add clang builtin for subgroup shuffles (#174655)

2026-01-08 15:55:50 -06:00

SystemZ.cpp

…

WebAssembly.cpp

[Clang][WebAssembly] Fix WASM tables to allow __funcref function pointers (#178720)

2026-02-04 09:55:36 -08:00

X86.cpp

[Clang][X86] Remove useless extractvalue on aesencwide/aesdecwide builtin CodeGen (#175113)

2026-01-12 11:29:46 +08:00