01e23c3d62
This (mostly) removes one of the largest remaining limitations of
`hipstdpar` based algorithm acceleration, by adding support for global
variable usage in offloaded algorithms. It is mean to compose with a run
time component that will live in the support library, and fires iff a
special variable is provided by the latter. In short, things work as
follows:
- We replace uses some global `G` with an indirect access via an
implicitly created anonymous global `F`, which is of pointer type and is
expected to hold the program-wide address of `G`;
- We append 'F', alongside 'G''s name, to an table structure;
- At run-time, the support library uses the table to look-up the
program-wide address of a contained symbol based on its name, and then
stores the address via the paired pointer.
This doesn't handle internal linkage symbols (`static foo` or `namespace
{ foo }`) if they are not unique i.e. if there's a name clash that is
solved by the linker, as the resolution would not be visible. Also,
initially we will only support "true" globals in RDC mode. Things would
be much simpler if we had direct access to the accelerator loader, but
since the expectation is to compose at the HIP RT level we have to jump
through additional hoops.
15 lines
588 B
LLVM
15 lines
588 B
LLVM
; REQUIRES: amdgpu-registered-target
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; RUN: not opt -S -mtriple=amdgcn-amd-amdhsa -passes=hipstdpar-select-accelerator-code \
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; RUN: %s 2>&1 | FileCheck %s
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; CHECK: error: The Indirection Table must have 3 elements; 2 is incorrect.
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%class.anon = type { i64, ptr }
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@a = external hidden local_unnamed_addr addrspace(1) global ptr, align 8
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@__hipstdpar_symbol_indirection_table = weak_odr protected addrspace(4) externally_initialized constant %class.anon zeroinitializer, align 8
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define amdgpu_kernel void @store(ptr %p) {
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entry:
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store ptr %p, ptr addrspace(1) @a, align 8
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ret void
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}
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