7f107c3019
While sinking instructions (that are loop invariant) from preheader to the exit block, we are skipping instructions due to decrementing instruction iterator twice.
107 lines
3.3 KiB
LLVM
107 lines
3.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -passes=indvars -S | FileCheck %s
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define i32 @logical_and_2ops(i32 %n, i32 %m) {
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; CHECK-LABEL: @logical_and_2ops(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: br i1 false, label [[LOOP]], label [[EXIT:%.*]]
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; CHECK: exit:
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; CHECK-NEXT: [[TMP0:%.*]] = freeze i32 [[M:%.*]]
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; CHECK-NEXT: [[UMIN:%.*]] = call i32 @llvm.umin.i32(i32 [[TMP0]], i32 [[N:%.*]])
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; CHECK-NEXT: ret i32 [[UMIN]]
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;
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entry:
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br label %loop
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loop:
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%i = phi i32 [0, %entry], [%i.next, %loop]
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%i.next = add i32 %i, 1
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%cond_p0 = icmp ult i32 %i, %n
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%cond_p1 = icmp ult i32 %i, %m
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%cond = select i1 %cond_p0, i1 %cond_p1, i1 false
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br i1 %cond, label %loop, label %exit
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exit:
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ret i32 %i
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}
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define i32 @logical_or_2ops(i32 %n, i32 %m) {
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; CHECK-LABEL: @logical_or_2ops(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: br i1 true, label [[EXIT:%.*]], label [[LOOP]]
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; CHECK: exit:
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; CHECK-NEXT: [[TMP0:%.*]] = freeze i32 [[M:%.*]]
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; CHECK-NEXT: [[UMIN:%.*]] = call i32 @llvm.umin.i32(i32 [[TMP0]], i32 [[N:%.*]])
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; CHECK-NEXT: ret i32 [[UMIN]]
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;
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entry:
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br label %loop
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loop:
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%i = phi i32 [0, %entry], [%i.next, %loop]
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%i.next = add i32 %i, 1
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%cond_p0 = icmp uge i32 %i, %n
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%cond_p1 = icmp uge i32 %i, %m
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%cond = select i1 %cond_p0, i1 true, i1 %cond_p1
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br i1 %cond, label %exit, label %loop
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exit:
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ret i32 %i
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}
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define i32 @logical_and_3ops(i32 %n, i32 %m, i32 %k) {
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; CHECK-LABEL: @logical_and_3ops(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: br i1 false, label [[LOOP]], label [[EXIT:%.*]]
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; CHECK: exit:
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; CHECK-NEXT: [[TMP0:%.*]] = freeze i32 [[K:%.*]]
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; CHECK-NEXT: [[TMP1:%.*]] = freeze i32 [[M:%.*]]
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; CHECK-NEXT: [[UMIN:%.*]] = call i32 @llvm.umin.i32(i32 [[TMP0]], i32 [[TMP1]])
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; CHECK-NEXT: [[UMIN1:%.*]] = call i32 @llvm.umin.i32(i32 [[UMIN]], i32 [[N:%.*]])
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; CHECK-NEXT: ret i32 [[UMIN1]]
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;
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entry:
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br label %loop
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loop:
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%i = phi i32 [0, %entry], [%i.next, %loop]
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%i.next = add i32 %i, 1
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%cond_p0 = icmp ult i32 %i, %n
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%cond_p1 = icmp ult i32 %i, %m
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%cond_p2 = icmp ult i32 %i, %k
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%cond_p3 = select i1 %cond_p0, i1 %cond_p1, i1 false
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%cond = select i1 %cond_p3, i1 %cond_p2, i1 false
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br i1 %cond, label %loop, label %exit
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exit:
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ret i32 %i
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}
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define i32 @logical_or_3ops(i32 %n, i32 %m, i32 %k) {
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; CHECK-LABEL: @logical_or_3ops(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: br i1 true, label [[EXIT:%.*]], label [[LOOP]]
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; CHECK: exit:
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; CHECK-NEXT: [[TMP0:%.*]] = freeze i32 [[K:%.*]]
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; CHECK-NEXT: [[TMP1:%.*]] = freeze i32 [[M:%.*]]
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; CHECK-NEXT: [[UMIN:%.*]] = call i32 @llvm.umin.i32(i32 [[TMP0]], i32 [[TMP1]])
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; CHECK-NEXT: [[UMIN1:%.*]] = call i32 @llvm.umin.i32(i32 [[UMIN]], i32 [[N:%.*]])
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; CHECK-NEXT: ret i32 [[UMIN1]]
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;
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entry:
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br label %loop
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loop:
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%i = phi i32 [0, %entry], [%i.next, %loop]
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%i.next = add i32 %i, 1
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%cond_p0 = icmp uge i32 %i, %n
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%cond_p1 = icmp uge i32 %i, %m
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%cond_p2 = icmp uge i32 %i, %k
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%cond_p3 = select i1 %cond_p0, i1 true, i1 %cond_p1
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%cond = select i1 %cond_p3, i1 true, i1 %cond_p2
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br i1 %cond, label %exit, label %loop
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exit:
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ret i32 %i
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}
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