7773243d99
Some of the tests from the X86 directory can be generalized to improve coverage for other architectures
78 lines
2.5 KiB
LLVM
78 lines
2.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
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; RUN: %if x86-registered-target %{ opt -S --passes=slp-vectorizer -slp-threshold=-99999 -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s %}
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; RUN: %if aarch64-registered-target %{ opt -S --passes=slp-vectorizer -slp-threshold=-99999 -mtriple=aarch64-unknown-linux-gnu < %s | FileCheck %s %}
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define void @test(i32 %arg) {
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; CHECK-LABEL: define void @test(
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; CHECK-SAME: i32 [[ARG:%.*]]) {
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; CHECK-NEXT: bb:
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; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i32> <i32 poison, i32 0>, i32 [[ARG]], i32 0
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; CHECK-NEXT: br label [[BB2:%.*]]
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; CHECK: bb2:
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; CHECK-NEXT: switch i32 0, label [[BB10:%.*]] [
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; CHECK-NEXT: i32 0, label [[BB9:%.*]]
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; CHECK-NEXT: i32 11, label [[BB9]]
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; CHECK-NEXT: i32 1, label [[BB4:%.*]]
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; CHECK-NEXT: ]
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; CHECK: bb3:
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; CHECK-NEXT: [[TMP1:%.*]] = extractelement <2 x i32> [[TMP0]], i32 0
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; CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64
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; CHECK-NEXT: switch i32 0, label [[BB10]] [
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; CHECK-NEXT: i32 18, label [[BB7:%.*]]
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; CHECK-NEXT: i32 1, label [[BB7]]
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; CHECK-NEXT: i32 0, label [[BB10]]
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; CHECK-NEXT: ]
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; CHECK: bb4:
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; CHECK-NEXT: [[TMP3:%.*]] = phi <2 x i32> [ [[TMP0]], [[BB2]] ]
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; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x i32> [[TMP3]], i32 0
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; CHECK-NEXT: [[TMP5:%.*]] = zext i32 [[TMP4]] to i64
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; CHECK-NEXT: [[GETELEMENTPTR:%.*]] = getelementptr i32, ptr null, i64 [[TMP5]]
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; CHECK-NEXT: [[TMP7:%.*]] = extractelement <2 x i32> [[TMP3]], i32 1
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; CHECK-NEXT: [[TMP6:%.*]] = zext i32 [[TMP7]] to i64
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; CHECK-NEXT: [[GETELEMENTPTR6:%.*]] = getelementptr i32, ptr null, i64 [[TMP6]]
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; CHECK-NEXT: ret void
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; CHECK: bb7:
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; CHECK-NEXT: [[PHI8:%.*]] = phi i64 [ [[TMP2]], [[BB3:%.*]] ], [ [[TMP2]], [[BB3]] ]
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; CHECK-NEXT: br label [[BB9]]
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; CHECK: bb9:
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; CHECK-NEXT: ret void
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; CHECK: bb10:
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; CHECK-NEXT: ret void
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;
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bb:
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%zext = zext i32 %arg to i64
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%zext1 = zext i32 0 to i64
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br label %bb2
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bb2:
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switch i32 0, label %bb10 [
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i32 0, label %bb9
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i32 11, label %bb9
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i32 1, label %bb4
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]
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bb3:
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switch i32 0, label %bb10 [
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i32 18, label %bb7
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i32 1, label %bb7
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i32 0, label %bb10
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]
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bb4:
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%phi = phi i64 [ %zext, %bb2 ]
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%phi5 = phi i64 [ %zext1, %bb2 ]
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%getelementptr = getelementptr i32, ptr null, i64 %phi
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%getelementptr6 = getelementptr i32, ptr null, i64 %phi5
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ret void
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bb7:
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%phi8 = phi i64 [ %zext, %bb3 ], [ %zext, %bb3 ]
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br label %bb9
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bb9:
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ret void
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bb10:
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ret void
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}
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