Brox Chen b1fe7dabce

[AMDGPU][True16][CodeGen] enable true16 for more codegen test patch 2 (#131210) ...

This is a NFC patch.

Enable true16 mode for more CodeGen tests

2025-03-14 14:57:55 -04:00

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AArch64

SelectionDAG: neg (and x, 1) --> SIGN_EXTEND_INREG x, i1 (#131239)

2025-03-14 10:47:56 -07:00

AMDGPU

[AMDGPU][True16][CodeGen] enable true16 for more codegen test patch 2 (#131210)

2025-03-14 14:57:55 -04:00

ARC

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ARM

[RemoveDIs] Remove "try-debuginfo-iterators..." test flags (#130298)

2025-03-14 15:50:49 +00:00

AVR

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BPF

[BPF] Fix BitCast Assertion with NonZero AddrSpace (#130722)

2025-03-11 11:23:53 -07:00

CSKY

[CSKY] Update fp16-promote.ll test (NFC)

2025-03-05 12:42:32 +01:00

DirectX

Follow up to #130230 - update missed test

2025-03-13 09:32:43 -07:00

Generic

[RemoveDIs] Remove "try-debuginfo-iterators..." test flags (#130298)

2025-03-14 15:50:49 +00:00

Hexagon

[HEXAGON] Fix semantics of ordered FP compares (#131089)

2025-03-13 14:48:31 -05:00

Inputs

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Lanai

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LoongArch

Rename ExpandLargeFpConvertPass to ExpandFpPass (#131128)

2025-03-14 13:11:45 +01:00

M68k

Rename ExpandLargeFpConvertPass to ExpandFpPass (#131128)

2025-03-14 13:11:45 +01:00

Mips

[Mips] Reserve hardware register HWR2 (#127775)

2025-02-20 20:53:30 +08:00

MIR

MIR: Replace undef with poison in some MIR tests (#131282)

2025-03-15 00:20:18 +07:00

MLRegAlloc

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MSP430

[SelectionDAG] Utilizing target hook convertSelectOfConstantsToMath for SelectwithConstant (#127599)

2025-02-25 20:32:24 +05:30

NVPTX

[NVPTX] Fix bug in sign of bfe folding (#130862)

2025-03-12 10:19:58 -07:00

PowerPC

Rename ExpandLargeFpConvertPass to ExpandFpPass (#131128)

2025-03-14 13:11:45 +01:00

RISCV

Rename ExpandLargeFpConvertPass to ExpandFpPass (#131128)

2025-03-14 13:11:45 +01:00

SPARC

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SPIRV

[SPIR-V] Support SPV_INTEL_fp_max_error extension for !fpmath metadata (#130619)

2025-03-14 12:12:28 +01:00

SystemZ

[MachineLateInstrsCleanup] Handle multiple kills for a preceding definition. (#119132)

2025-03-13 15:50:54 +01:00

Thumb

[RegAlloc][NewPM] Plug Greedy RA in codegen pipeline (#120557)

2025-03-03 11:06:15 +05:30

Thumb2

[CodeGen] Combine two loops in SlotIndexes.cpp file (#127631)

2025-03-07 08:17:23 +07:00

VE

[NVPTX] Legalize ctpop and ctlz in operation legalization (#130668)

2025-03-12 09:28:40 -07:00

WebAssembly

[WebAssembly] Remove wasm-specific findWasmUnwindDestinations (#130374)

2025-03-10 20:56:38 -07:00

WinCFGuard

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WinEH

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X86

[X86] combineConcatVectorOps - use ConcatSubOperand for X86ISD::VPERMV operand concatenation (#131352)

2025-03-14 18:07:19 +00:00

XCore

Reland: [MC] output inlined-at debug info (#106230) (#130306)

2025-03-11 09:43:14 -04:00

Xtensa

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