Jay Foad b36f89faed

[AMDGPU] Make rotr illegal (#166558) ...

fshr is already legal and is strictly more powerful than rotr, so we
should only need selection patterns for fshr.

2025-12-05 12:39:50 +00:00

..

AArch64

[AArch64] Add intrinsics for multi-vector FEAT_SVE_BFSCALE instructions (#163536)

2025-12-05 12:32:49 +00:00

AMDGPU

[AMDGPU] Make rotr illegal (#166558)

2025-12-05 12:39:50 +00:00

ARC

…

ARM

Avoid maxnum(sNaN, x) optimizations / folds (#170181)

2025-12-02 12:43:03 +00:00

AVR

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BPF

Revert "[BPF] Allow libcalls behind a feature gate (#168442)" (#169733)

2025-12-01 11:19:39 -08:00

CSKY

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DirectX

[NFC] Add missing analysis to DirectX/llc-pipeline (#170714)

2025-12-04 18:56:23 +00:00

Generic

[CodeGen] Fix lpad padding at section start after empty block (#112595)

2025-12-04 10:29:24 +08:00

Hexagon

[HEXAGON] [MachinePipeliner] Fix the DAG in case of dependent phis. (#135925)

2025-12-04 13:27:54 -06:00

Inputs

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Lanai

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LoongArch

[LoongArch][NFC] Pre-commit tests for shufflevector reversing within subvectors (#170621)

2025-12-04 16:23:48 +08:00

M68k

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Mips

expandFMINIMUMNUM_FMAXIMUMNUM: Improve compare between zeros (#140193)

2025-12-04 10:20:02 +08:00

MIR

[CodeGen] Add MO_LaneMask type and a new COPY_LANEMASK instruction (#151944)

2025-12-03 13:56:15 +05:30

MIR2Vec

[CodeGen] Add MO_LaneMask type and a new COPY_LANEMASK instruction (#151944)

2025-12-03 13:56:15 +05:30

MLRegAlloc

[MLGO] Remove Extra Dev Mode Features (#167273)

2025-11-10 08:40:28 -08:00

MSP430

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NVPTX

[MachineBasicBlock] Don't split loop header successor if the terminator is unanalyzable (#170146)

2025-12-03 15:55:59 +00:00

PowerPC

[PowerPC] Add initial support for AMO load builtins (#168746)

2025-12-03 17:47:56 -05:00

RISCV

[DAG] Fold mul 0 -> 0 when expanding mul into parts. (#168780)

2025-12-05 07:58:28 +00:00

SPARC

[SPARC] Remove CCIfConsecutiveRegs for f128 returns (#170133)

2025-12-03 15:38:48 -05:00

SPIRV

CodeGen: Add LibcallLoweringInfo analysis pass (#168622)

2025-12-03 22:00:12 +01:00

SystemZ

[SystemZ] Handle IR struct arguments correctly. (#169583)

2025-12-04 13:14:31 -06:00

Thumb

[DAG] Fold mul 0 -> 0 when expanding mul into parts. (#168780)

2025-12-05 07:58:28 +00:00

Thumb2

[ARM] Introduce intrinsics for MVE minnm/maxnm under strict-fp. (#169795)

2025-12-02 17:23:15 +00:00

VE

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WebAssembly

Revert "[WebAssembly] Implement addrspacecast to funcref" (#170785)

2025-12-04 17:24:14 -08:00

WinCFGuard

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WinEH

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X86

[X86] LowerShuffle - don't call canonicalizeShuffleMaskWithHorizOp if we could shuffle whole lanes (#170838)

2025-12-05 11:55:07 +00:00

XCore

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Xtensa

[Xtensa] Fix S32C1I instruction encoding and copyPhysReg. (#165174)

2025-11-05 20:27:11 +03:00