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llvm-project/llvm/lib/Target/AMDGPU
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Kazu Hirata 197c3a3efc
Use llvm::less_first (NFC) (#94136)
2024-06-02 07:45:50 -07:00
..
AsmParser
MCExpr-ify amd_kernel_code_t (#91587)
2024-05-22 13:45:45 +01:00
Disassembler
Add clarifying parenthesis around non-trivial conditions in ternary expressions. (#90391)
2024-05-04 18:38:45 +01:00
MCA
[AMDGPU][SIInsertWaitcnts] Do not add s_waitcnt when the counters are known to be 0 already (#72830)
2023-12-15 12:33:32 +01:00
MCTargetDesc
AMDGPU: Add gfx12-generic target (#93875)
2024-05-31 12:46:44 -04:00
TargetInfo
[AMDGPU] Eliminate SIMCCodeEmitter and de-virtualise encoding methods.
2023-07-05 10:13:33 +01:00
Utils
AMDGPU: Add gfx12-generic target (#93875)
2024-05-31 12:46:44 -04:00
AMDGPU.h
Revert "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94146)
2024-06-02 14:31:52 +08:00
AMDGPU.td
AMDGPU: Add gfx12-generic target (#93875)
2024-05-31 12:46:44 -04:00
AMDGPUAliasAnalysis.cpp
[AA] Skip the layer of indirection in returning conservative results.
2023-07-28 12:13:35 -07:00
AMDGPUAliasAnalysis.h
…
AMDGPUAlwaysInlinePass.cpp
[AMDGPU] Always Inline preserved analyses (#91198)
2024-05-09 06:17:01 -04:00
AMDGPUAnnotateKernelFeatures.cpp
…
AMDGPUAnnotateUniformValues.cpp
…
AMDGPUArgumentUsageInfo.cpp
[AMDGPU] Add DAG ISel support for preloaded kernel arguments
2023-09-25 09:32:59 -07:00
AMDGPUArgumentUsageInfo.h
[AMDGPU] Miscellaneous clang-format changes (#75186)
2023-12-12 14:26:04 +00:00
AMDGPUAsmPrinter.cpp
MCExpr-ify amd_kernel_code_t (#91587)
2024-05-22 13:45:45 +01:00
AMDGPUAsmPrinter.h
MCExpr-ify amd_kernel_code_t (#91587)
2024-05-22 13:45:45 +01:00
AMDGPUAtomicOptimizer.cpp
[AMDGPU] Build lane intrinsics in a mangling-agnostic way. NFC. (#91583)
2024-05-09 13:42:40 +01:00
AMDGPUAttributes.def
…
AMDGPUAttributor.cpp
[Target] Use StringRef::operator== instead of StringRef::equals (NFC) (#91072) (#91138)
2024-05-05 13:43:10 -07:00
AMDGPUCallingConv.td
Revert "Update amdgpu_gfx functions to use s0-s3 for inreg SGPR arguments on targets using scratch instructions for stack #78226" (#86273)
2024-03-26 11:01:08 +01:00
AMDGPUCallLowering.cpp
Revert "Update amdgpu_gfx functions to use s0-s3 for inreg SGPR arguments on targets using scratch instructions for stack #78226" (#86273)
2024-03-26 11:01:08 +01:00
AMDGPUCallLowering.h
[AMDGPU] ISel for @llvm.amdgcn.cs.chain intrinsic (#68186)
2023-11-06 12:30:07 +01:00
AMDGPUCodeGenPassBuilder.cpp
Revert "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94146)
2024-06-02 14:31:52 +08:00
AMDGPUCodeGenPassBuilder.h
[NewPM][AMDGPU] Add CodeGenPassBuilder (#91040)
2024-05-19 15:57:02 +08:00
AMDGPUCodeGenPrepare.cpp
[AMDGPU] Fix missing IsExact flag when expanding vector binary operator (#86712)
2024-03-27 17:40:58 -04:00
AMDGPUCombine.td
[AMDGPU] Fix typo in function name
2024-05-06 08:55:09 +01:00
AMDGPUCombinerHelper.cpp
AMDGPU/GlobalISel: Use correct type for intrinsic ID
2024-05-30 14:31:19 +02:00
AMDGPUCombinerHelper.h
…
AMDGPUCtorDtorLowering.cpp
[llvm] Replace calls to Type::getPointerTo (NFC)
2023-11-30 13:18:51 -06:00
AMDGPUCtorDtorLowering.h
…
AMDGPUExportClustering.cpp
…
AMDGPUExportClustering.h
…
AMDGPUFeatures.td
…
AMDGPUFrameLowering.cpp
…
AMDGPUFrameLowering.h
…
AMDGPUGenRegisterBankInfo.def
Silence illegal address computation warning (#83244)
2024-03-01 21:41:12 +05:30
AMDGPUGISel.td
[AMDGPU] Legalize and select raw/struct_buffer_load with tfe (#93310)
2024-05-27 14:09:17 +02:00
AMDGPUGlobalISelDivergenceLowering.cpp
AMDGPU/GlobalISel: lane masks merging (#73337)
2024-02-29 13:57:59 +01:00
AMDGPUGlobalISelUtils.cpp
[AMDGPU] Remove hasAtomicFaddRtnForTy as it is not used anywhere (#82841)
2024-02-23 21:14:38 -05:00
AMDGPUGlobalISelUtils.h
[AMDGPU] Remove hasAtomicFaddRtnForTy as it is not used anywhere (#82841)
2024-02-23 21:14:38 -05:00
AMDGPUHSAMetadataStreamer.cpp
MCExpr-ify SIProgramInfo (#88257)
2024-05-09 13:02:32 +01:00
AMDGPUHSAMetadataStreamer.h
[AMDGPU] Fix unittest linking error with LLVM_LINK_LLVM_DYLIB (#91727)
2024-05-11 09:18:05 +02:00
AMDGPUIGroupLP.cpp
[AMDGPU] Do not attempt to fallback to default mutations (#83208)
2024-02-27 18:04:59 -08:00
AMDGPUIGroupLP.h
[AMDGPU] Do not attempt to fallback to default mutations (#83208)
2024-02-27 18:04:59 -08:00
AMDGPUImageIntrinsicOptimizer.cpp
[AMDGPU] Use llvm::none_of (NFC)
2024-01-24 00:27:37 -08:00
AMDGPUInsertDelayAlu.cpp
[AMDGPU] Add functions for composing and decomposing S_WAIT_DEPCTR operands
2023-07-04 11:02:12 +01:00
AMDGPUInsertSingleUseVDST.cpp
Fix MSVC signed/unsigned mismatch warning. NFC.
2024-05-03 09:38:51 +01:00
AMDGPUInstCombineIntrinsic.cpp
Replace uses of ConstantExpr::getCompare. (#91558)
2024-05-09 16:50:01 -07:00
AMDGPUInstrInfo.cpp
Restore "[GlobalISel] GIntrinsic subclass to represent intrinsics in Generic Machine IR"
2023-07-27 14:49:17 +05:30
AMDGPUInstrInfo.h
AMDGPU/GlobalISel: Use correct type for intrinsic ID
2024-05-30 14:31:19 +02:00
AMDGPUInstrInfo.td
[AMDGPU] Add a trap lowering workaround for gfx11 (#85854)
2024-04-24 09:43:54 -04:00
AMDGPUInstructions.td
[AMDGPU] HasOneUse uses (#92534)
2024-05-21 11:25:39 -04:00
AMDGPUInstructionSelector.cpp
AMDGPU/GlobalISel: Use correct type for intrinsic ID
2024-05-30 14:31:19 +02:00
AMDGPUInstructionSelector.h
[AMDGPU] New intrinsic llvm.amdgcn.pops.exiting.wave.id (#89612)
2024-05-22 19:47:59 +01:00
AMDGPUISelDAGToDAG.cpp
Revert "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94146)
2024-06-02 14:31:52 +08:00
AMDGPUISelDAGToDAG.h
Revert "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94146)
2024-06-02 14:31:52 +08:00
AMDGPUISelLowering.cpp
[AMDGPU] Legalize and select raw/struct_buffer_load with tfe (#93310)
2024-05-27 14:09:17 +02:00
AMDGPUISelLowering.h
[AMDGPU] Legalize and select raw/struct_buffer_load with tfe (#93310)
2024-05-27 14:09:17 +02:00
AMDGPULateCodeGenPrepare.cpp
[AMDGPU] Do not widen scalar loads on GFX12 (#78724)
2024-01-19 15:30:07 +00:00
AMDGPULegalizerInfo.cpp
[AMDGPU] Legalize and select raw/struct_buffer_load with tfe (#93310)
2024-05-27 14:09:17 +02:00
AMDGPULegalizerInfo.h
[AMDGPU] Use LSH for lowering ctlz_zero_undef.i8/i16 (#88512)
2024-05-19 21:45:24 +01:00
AMDGPULibCalls.cpp
AMDGPU: Emit 1/llvm.sqrt(x) instead of rsqrt calls in libcall handling (#92863)
2024-05-21 18:42:45 +02:00
AMDGPULibFunc.cpp
[llvm] Use StringRef::{starts,ends}_with (NFC) (#74956)
2023-12-11 21:01:36 -08:00
AMDGPULibFunc.h
AMDGPU: Use pown instead of pow if known integral
2023-09-01 08:22:16 -04:00
AMDGPULowerBufferFatPointers.cpp
[IR] Add getelementptr nusw and nuw flags (#90824)
2024-05-27 16:05:17 +02:00
AMDGPULowerKernelArguments.cpp
[AMDGPU] Enable kernel arg preloading with gfx90a (#81180)
2024-02-12 22:33:29 -08:00
AMDGPULowerKernelAttributes.cpp
[AMDGPU] Add an asm directive to track code_object_version (#76267)
2024-01-21 11:54:47 -05:00
AMDGPULowerModuleLDSPass.cpp
[AMDGPU] Use removeFnAttrFromReachable in lower-module-lds pass. (#92686)
2024-05-20 10:24:40 +05:30
AMDGPUMachineCFGStructurizer.cpp
Use object directly instead of accessing ArrayRef (#83263)
2024-03-01 19:15:42 +05:30
AMDGPUMachineFunction.cpp
[AMDGPU] Add dynamic LDS size implicit kernel argument to CO-v5 (#65273)
2024-01-04 19:05:12 +05:30
AMDGPUMachineFunction.h
[AMDGPU] Add dynamic LDS size implicit kernel argument to CO-v5 (#65273)
2024-01-04 19:05:12 +05:30
AMDGPUMachineModuleInfo.cpp
…
AMDGPUMachineModuleInfo.h
…
AMDGPUMacroFusion.cpp
[DAG] clang-format createBranchMacroFusionDAGMutation calls. NFC.
2023-11-20 12:13:09 +00:00
AMDGPUMacroFusion.h
…
AMDGPUMarkLastScratchLoad.cpp
[AMDGPU] Add mark last scratch load pass (#75512)
2024-01-18 09:36:44 +01:00
AMDGPUMCInstLower.cpp
[AMDGPU] Fix expensive-checks build.
2023-07-05 10:26:21 +01:00
AMDGPUMCInstLower.h
…
AMDGPUMIRFormatter.cpp
…
AMDGPUMIRFormatter.h
…
AMDGPUOpenCLEnqueuedBlockLowering.cpp
[NFC] Remove Type::getInt8PtrTy (#71029)
2023-11-07 17:26:26 +01:00
AMDGPUPassRegistry.def
Revert "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94146)
2024-06-02 14:31:52 +08:00
AMDGPUPerfHintAnalysis.cpp
…
AMDGPUPerfHintAnalysis.h
…
AMDGPUPostLegalizerCombiner.cpp
[AMDGPU] Fix typo in function name
2024-05-06 08:55:09 +01:00
AMDGPUPredicateControl.td
[AMDGPU][TableGen][NFC] Combine predicates without using classes. (#82346)
2024-02-21 11:45:36 +00:00
AMDGPUPreLegalizerCombiner.cpp
[AMDGPU] Remove unneeded calls to setInstrAndDebugLoc in matchers. NFC.
2024-05-03 15:01:47 +01:00
AMDGPUPrintfRuntimeBinding.cpp
[NFC][RemoveDIs] Use iterators for insertion at various call-sites (#84736)
2024-03-19 16:36:29 +00:00
AMDGPUPromoteAlloca.cpp
[AMDGPU][PromoteAlloca] Don't stop when an alloca is too big to promote (#93466)
2024-05-28 08:05:50 +02:00
AMDGPUPromoteKernelArguments.cpp
[llvm] Remove uses of getWithSamePointeeType() (NFC)
2023-07-18 12:07:09 +02:00
AMDGPUPTNote.h
…
AMDGPURegBankCombiner.cpp
[AMDGPU] Remove unneeded calls to setInstrAndDebugLoc in matchers. NFC.
2024-05-03 15:01:47 +01:00
AMDGPURegBankSelect.cpp
AMDGPU: Special case uniformity info for single lane workgroups
2023-06-28 07:25:48 -04:00
AMDGPURegBankSelect.h
…
AMDGPURegisterBankInfo.cpp
[AMDGPU] Legalize and select raw/struct_buffer_load with tfe (#93310)
2024-05-27 14:09:17 +02:00
AMDGPURegisterBankInfo.h
[AMDGPU] Make isScalarLoadLegal a member of AMDGPURegisterBankInfo. NFC.
2024-01-09 11:53:12 +00:00
AMDGPURegisterBanks.td
[AMDGPU][True16] Don't use the VGPR_LO/HI16 register classes. (#76440)
2023-12-28 11:48:25 +00:00
AMDGPURemoveIncompatibleFunctions.cpp
[AMDGPU] Introduce GFX9/10.1/10.3/11 Generic Targets (#76955)
2024-02-12 10:18:20 +01:00
AMDGPUResourceUsageAnalysis.cpp
[Target][AMDGPU] Fix TSan error on AMDGPU Target. (#79529)
2024-01-25 21:32:37 -08:00
AMDGPUResourceUsageAnalysis.h
[Target][AMDGPU] Fix TSan error on AMDGPU Target. (#79529)
2024-01-25 21:32:37 -08:00
AMDGPURewriteOutArguments.cpp
[llvm] Stop including llvm/ADT/SmallSet.h (NFC)
2023-11-11 12:32:15 -08:00
AMDGPURewriteUndefForPHI.cpp
[AMDGPU] Do not preserve UniformityInfo (#76696)
2024-01-02 13:42:56 +05:30
AMDGPUSearchableTables.td
AMDGPU: Rename intrinsics and remove f16/bf16 versions for load transpose (#86313)
2024-03-25 16:55:22 -07:00
AMDGPUSetWavePriority.cpp
…
AMDGPUSplitModule.cpp
[AMDGPU][SplitModule] Keep looking for more dependencies after finding an indirect call (#93480)
2024-05-28 08:18:53 +02:00
AMDGPUSplitModule.h
Reland "[AMDGPU] Add AMDGPU-specific module splitting (#89245)"
2024-05-27 10:43:00 +02:00
AMDGPUSubtarget.cpp
MCExpr-ify SIProgramInfo (#88257)
2024-05-09 13:02:32 +01:00
AMDGPUSubtarget.h
[AMDGPU] Adding the amdgpu_num_work_groups function attribute (#79035)
2024-03-12 10:30:39 -07:00
AMDGPUTargetMachine.cpp
Revert "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94146)
2024-06-02 14:31:52 +08:00
AMDGPUTargetMachine.h
Reland "[AMDGPU] Add AMDGPU-specific module splitting (#89245)"
2024-05-27 10:43:00 +02:00
AMDGPUTargetObjectFile.cpp
[llvm] Use StringRef::{starts,ends}_with (NFC) (#74956)
2023-12-11 21:01:36 -08:00
AMDGPUTargetObjectFile.h
…
AMDGPUTargetTransformInfo.cpp
[AMDGPU] Vectorize more 16 bit shuffles (#90648)
2024-05-21 09:21:36 -07:00
AMDGPUTargetTransformInfo.h
[TTI] getArithmeticInstrCost - use std:nullopt to create default empty ArrayRef<const Value *> Args argument. NFC.
2024-04-24 10:51:18 +01:00
AMDGPUUnifyDivergentExitNodes.cpp
[AMDGPU] Do not preserve UniformityInfo (#76696)
2024-01-02 13:42:56 +05:30
AMDGPUUnifyDivergentExitNodes.h
…
AMDGPUUnifyMetadata.cpp
…
AMDKernelCodeT.h
…
BUFInstructions.td
[AMDGPU] Copy Defs and Uses from Pseudo to Real Instructions (#93004)
2024-05-31 08:40:54 +02:00
CaymanInstructions.td
…
CMakeLists.txt
Reland "[AMDGPU] Add AMDGPU-specific module splitting (#89245)"
2024-05-27 10:43:00 +02:00
DSDIRInstructions.td
AMDGPU: Use PseudoInstr to name SIMCInstr for DSDIR and SOPs, NFC (#87537)
2024-04-03 11:35:09 -07:00
DSInstructions.td
[AMDGPU] Copy Defs and Uses from Pseudo to Real Instructions (#93004)
2024-05-31 08:40:54 +02:00
EvergreenInstructions.td
…
EXPInstructions.td
[AMDGPU] Remove unnecessary predicates from aliases. NFC. (#91602)
2024-05-10 15:04:38 +01:00
FLATInstructions.td
[AMDGPU] Copy Defs and Uses from Pseudo to Real Instructions (#93004)
2024-05-31 08:40:54 +02:00
GCNCreateVOPD.cpp
[AMDGPU] Fix implicit operands of VOPD cndmask instructions (#87788)
2024-04-16 10:14:15 +01:00
GCNDPPCombine.cpp
[AMDGPU] Support byte_sel modifier for v_cvt_f32_fp8 and v_cvt_f32_bf8 (#90887)
2024-05-02 12:03:51 -07:00
GCNHazardRecognizer.cpp
[AMDGPU] Remove some pointless fallthrough annotations
2024-05-01 16:04:35 +01:00
GCNHazardRecognizer.h
…
GCNILPSched.cpp
Add llvm::min/max_element and use it in llvm/ and mlir/ directories. (#84678)
2024-03-10 20:00:13 -07:00
GCNIterativeScheduler.cpp
[AMDGPU] Prefer lower total register usage in regions with spilling
2024-02-26 12:19:52 -08:00
GCNIterativeScheduler.h
…
GCNMinRegStrategy.cpp
…
GCNNSAReassign.cpp
[AMDGPU] Do not run GCNNSAReassign pass for GFX12 (#78185)
2024-01-17 15:22:48 +00:00
GCNPreRALongBranchReg.cpp
[AMDGPU] Reserve SGPR pair when long branches are present
2023-06-29 16:50:46 -05:00
GCNPreRAOptimizations.cpp
…
GCNProcessors.td
AMDGPU: Add gfx12-generic target (#93875)
2024-05-31 12:46:44 -04:00
GCNRegPressure.cpp
[AMDGPU] Prefer lower total register usage in regions with spilling
2024-02-26 12:19:52 -08:00
GCNRegPressure.h
[AMDGPU] Prefer lower total register usage in regions with spilling
2024-02-26 12:19:52 -08:00
GCNRewritePartialRegUses.cpp
[AMDGPU] Fix GCNRewritePartialRegUses pass: vector regclass is selected instead of scalar. (#69957)
2023-11-16 16:56:46 +01:00
GCNSchedStrategy.cpp
[AMDGPU] Use correct VGPR threshold for flagging ExcessRP regions in unified register file case (#85860)
2024-03-25 13:11:58 -07:00
GCNSchedStrategy.h
[AMDGPU] Fix typos. NFC
2024-01-26 12:04:58 +01:00
GCNSubtarget.h
AMDGPU: Fix creating minimum3/maximum3 nodes pre-gfx12 (#93027)
2024-05-23 15:59:43 +02:00
GCNVOPDUtils.cpp
[AMDGPU] Update VOP instructions for GFX12 (#74853)
2023-12-12 11:38:24 +01:00
GCNVOPDUtils.h
…
InstCombineTables.td
…
MIMGInstructions.td
[AMDGPU][MC] Support tfe operand in image_atomic instructions (#92469)
2024-05-29 15:55:58 -07:00
R600.h
[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)
2023-09-14 14:10:14 -07:00
R600.td
[AMDGPU][NFC] Extend PredicateControl to support True16 predicates. (#82245)
2024-02-20 11:37:44 +00:00
R600AsmPrinter.cpp
…
R600AsmPrinter.h
…
R600ClauseMergePass.cpp
…
R600CodeGenPassBuilder.cpp
[NewPM][AMDGPU] Add CodeGenPassBuilder (#91040)
2024-05-19 15:57:02 +08:00
R600CodeGenPassBuilder.h
[NewPM][AMDGPU] Add CodeGenPassBuilder (#91040)
2024-05-19 15:57:02 +08:00
R600ControlFlowFinalizer.cpp
…
R600Defines.h
…
R600EmitClauseMarkers.cpp
…
R600ExpandSpecialInstrs.cpp
…
R600FrameLowering.cpp
…
R600FrameLowering.h
…
R600InstrFormats.td
…
R600InstrInfo.cpp
[CodeGen] Make the parameter TRI required in some functions. (#85968)
2024-04-24 14:24:14 +01:00
R600InstrInfo.h
…
R600InstrInfo.td
…
R600Instructions.td
[AMDGPU] Generic lowering for rint and nearbyint (#69596)
2023-11-14 18:49:21 +01:00
R600ISelDAGToDAG.cpp
Revert "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94146)
2024-06-02 14:31:52 +08:00
R600ISelLowering.cpp
[Target] Use getConstantOperandVal (NFC)
2024-01-14 00:53:29 -08:00
R600ISelLowering.h
…
R600MachineCFGStructurizer.cpp
…
R600MachineFunctionInfo.cpp
…
R600MachineFunctionInfo.h
…
R600MachineScheduler.cpp
…
R600MachineScheduler.h
…
R600MCInstLower.cpp
…
R600OpenCLImageTypeLoweringPass.cpp
[llvm] Use StringRef::{starts,ends}_with (NFC) (#74956)
2023-12-11 21:01:36 -08:00
R600OptimizeVectorRegisters.cpp
[AMDGPU] Use llvm::all_of (NFC)
2024-01-30 22:12:07 -08:00
R600Packetizer.cpp
…
R600Processors.td
…
R600RegisterInfo.cpp
…
R600RegisterInfo.h
…
R600RegisterInfo.td
…
R600Schedule.td
…
R600Subtarget.cpp
…
R600Subtarget.h
…
R600TargetMachine.cpp
[NewPM][AMDGPU] Add CodeGenPassBuilder (#91040)
2024-05-19 15:57:02 +08:00
R600TargetMachine.h
[NewPM][AMDGPU] Add CodeGenPassBuilder (#91040)
2024-05-19 15:57:02 +08:00
R600TargetTransformInfo.cpp
[llvm][TypeSize] Fix addition/subtraction in TypeSize. (#72979)
2023-11-22 08:52:53 +00:00
R600TargetTransformInfo.h
…
R700Instructions.td
…
SIAnnotateControlFlow.cpp
[AMDGPU] Fix incorrect stepping in gdb for amdgcn.end.cf intrinsic. (#83010)
2024-05-02 12:59:31 +02:00
SIDefines.h
MCExpr-ify amd_kernel_code_t (#91587)
2024-05-22 13:45:45 +01:00
SIFixSGPRCopies.cpp
[CodeGen] Make the parameter TRI required in some functions. (#85968)
2024-04-24 14:24:14 +01:00
SIFixVGPRCopies.cpp
AMDGPU: Make SIFixVGPRCopies preserve everything
2023-07-06 10:26:21 -04:00
SIFoldOperands.cpp
[AMDGPU] Don't optimize agpr phis if the operand doesn't have subreg use (#91267)
2024-05-07 16:44:00 -04:00
SIFormMemoryClauses.cpp
…
SIFrameLowering.cpp
[AMDGPU] Reserved private memory register during PEI (#93536)
2024-05-29 15:10:44 +05:30
SIFrameLowering.h
Revert "[AMDGPU] Compiler should synthesize private buffer resource descriptor from flat_scratch_init" (#81234)
2024-02-09 09:57:38 +01:00
SIInsertHardClauses.cpp
[Codegen] Make Width in getMemOperandsWithOffsetWidth a LocationSize. (#83875)
2024-03-06 17:40:13 +00:00
SIInsertWaitcnts.cpp
[AMDGPU] Remove #if 0 code for indexed resources in SIInsertWaitcnts (#92905)
2024-05-21 13:51:42 +01:00
SIInstrFormats.td
[AMDGPU][NFC] Eliminate GCNPredicateControl. (#93964)
2024-05-31 16:28:43 +01:00
SIInstrInfo.cpp
AMDGPU: Remove arbitrary SCC liveness scan threshold (#94097)
2024-06-01 14:19:38 +02:00
SIInstrInfo.h
[AMDGPU] Enhance s_waitcnt insertion before barrier for gfx12 (#90595)
2024-05-01 11:37:13 +01:00
SIInstrInfo.td
[AMDGPU][NFC] Eliminate GCNPredicateControl. (#93964)
2024-05-31 16:28:43 +01:00
SIInstructions.td
[AMDGPU][NFC] Eliminate GCNPredicateControl. (#93964)
2024-05-31 16:28:43 +01:00
SIISelLowering.cpp
Revert "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94146)
2024-06-02 14:31:52 +08:00
SIISelLowering.h
[AMDGPU] Enable constant offset promotion to immediate FLAT (#93884)
2024-05-31 12:23:27 -07:00
SILateBranchLowering.cpp
[AMDGPU] ISel for @llvm.amdgcn.cs.chain intrinsic (#68186)
2023-11-06 12:30:07 +01:00
SILoadStoreOptimizer.cpp
[AMDGPU] Enable constant offset promotion to immediate FLAT (#93884)
2024-05-31 12:23:27 -07:00
SILowerControlFlow.cpp
[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)
2023-09-14 14:10:14 -07:00
SILowerI1Copies.cpp
AMDGPU/GlobalISelDivergenceLowering: select divergent i1 phis (#80003)
2024-02-05 14:07:01 +01:00
SILowerI1Copies.h
AMDGPU/GlobalISelDivergenceLowering: select divergent i1 phis (#80003)
2024-02-05 14:07:01 +01:00
SILowerSGPRSpills.cpp
[AMDGPU] Fix end() iterator dereference in SILowerSGPRSpills (#88828)
2024-04-18 09:34:27 -05:00
SILowerWWMCopies.cpp
Reapply "[CodeGen]Allow targets to use target specific COPY instructions for live range splitting"
2023-07-31 20:15:45 -04:00
SIMachineFunctionInfo.cpp
[AMDGPU] Fix typo in #89773
2024-04-29 11:57:06 +01:00
SIMachineFunctionInfo.h
Use llvm::less_first (NFC) (#94136)
2024-06-02 07:45:50 -07:00
SIMachineScheduler.cpp
Add llvm::min/max_element and use it in llvm/ and mlir/ directories. (#84678)
2024-03-10 20:00:13 -07:00
SIMachineScheduler.h
…
SIMemoryLegalizer.cpp
[AMDGPU] Add amdgpu-as MMRA for fences (#78572)
2024-05-27 12:17:04 +02:00
SIModeRegister.cpp
[AMDGPU] Fix mode register pass for constrained FP operations (#90085)
2024-05-03 19:47:15 +02:00
SIModeRegisterDefaults.cpp
Reapply "AMDGPU: Implement llvm.set.rounding (#88587)" series (#91113)
2024-05-06 09:09:19 +02:00
SIModeRegisterDefaults.h
Reapply "AMDGPU: Implement llvm.set.rounding (#88587)" series (#91113)
2024-05-06 09:09:19 +02:00
SIOptimizeExecMasking.cpp
Reapply "Convert many LivePhysRegs uses to LiveRegUnits" (#84338)
2024-03-08 19:05:00 +05:30
SIOptimizeExecMaskingPreRA.cpp
[CodeGen] Make the parameter TRI required in some functions. (#85968)
2024-04-24 14:24:14 +01:00
SIOptimizeVGPRLiveRange.cpp
[AMDGPU] Skip debug instruction uses while optimizing live range of a reg in SIOptimizeVGPRLiveRange
2023-08-07 11:35:39 +05:30
SIPeepholeSDWA.cpp
[AMDGPU] Don't form sext/abs/neg fp8 cvt (#83843)
2024-03-06 10:38:20 +01:00
SIPostRABundler.cpp
…
SIPreAllocateWWMRegs.cpp
[CodeGen] Do not pass MF into MachineRegisterInfo methods. NFC. (#84770)
2024-03-11 15:35:05 +00:00
SIPreEmitPeephole.cpp
[CodeGen] Make the parameter TRI required in some functions. (#85968)
2024-04-24 14:24:14 +01:00
SIProgramInfo.cpp
MCExpr-ify SIProgramInfo (#88257)
2024-05-09 13:02:32 +01:00
SIProgramInfo.h
[AMDGPU] Fix unittest linking error with LLVM_LINK_LLVM_DYLIB (#91727)
2024-05-11 09:18:05 +02:00
SIRegisterInfo.cpp
[AMDGPU] Reserved private memory register during PEI (#93536)
2024-05-29 15:10:44 +05:30
SIRegisterInfo.h
[CodeGen] Make some includes explicit (NFC)
2023-11-24 14:43:18 +01:00
SIRegisterInfo.td
[AMDGPU] Extend llvm.amdgcn.update.dpp intrinsic to support f64 (#91190)
2024-05-13 10:20:37 +05:30
SISchedule.td
AMDGPU: Correct cycle counts for f64 mfma on gfx940 (#83782)
2024-03-06 09:36:01 +05:30
SIShrinkInstructions.cpp
[CodeGen] Make the parameter TRI required in some functions. (#85968)
2024-04-24 14:24:14 +01:00
SIWholeQuadMode.cpp
[AMDGPU] Reduce use of continue in SIWholeQuadMode. NFC. (#93659)
2024-05-29 14:40:08 +01:00
SMInstructions.td
[AMDGPU] Copy Defs and Uses from Pseudo to Real Instructions (#93004)
2024-05-31 08:40:54 +02:00
SOPInstructions.td
[AMDGPU] Copy Defs and Uses from Pseudo to Real Instructions (#93004)
2024-05-31 08:40:54 +02:00
VIInstrFormats.td
…
VINTERPInstructions.td
[AMDGPU] Expose RTZ version of f16 interpolation for gfx11+ (#86614)
2024-04-01 09:48:37 +08:00
VOP1Instructions.td
[AMDGPU] Refactor int_amdgcn_mov_dpp8 patterns. NFC. (#92764)
2024-05-20 18:58:17 +01:00
VOP2Instructions.td
[AMDGPU] Create AMDGPUMnemonicAlias tablegen class (#89288)
2024-05-09 11:37:56 -04:00
VOP3Instructions.td
[AMDGPU] Support byte_sel modifier on v_cvt_sr_fp8_f32 and v_cvt_sr_bf8_f32 (#90244)
2024-04-26 13:02:57 -07:00
VOP3PInstructions.td
[AMDGPU] Create AMDGPUMnemonicAlias tablegen class (#89288)
2024-05-09 11:37:56 -04:00
VOPCInstructions.td
[AMDGPU] Create AMDGPUMnemonicAlias tablegen class (#89288)
2024-05-09 11:37:56 -04:00
VOPDInstructions.td
[AMDGPU] Update VOP instructions for GFX12 (#74853)
2023-12-12 11:38:24 +01:00
VOPInstructions.td
[AMDGPU] Copy Defs and Uses from Pseudo to Real Instructions (#93004)
2024-05-31 08:40:54 +02:00