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llvm-project/mlir/test/Conversion
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Amara Emerson 322d0afd87 [llvm][mlir] Promote the experimental reduction intrinsics to be first class intrinsics. 
This change renames the intrinsics to not have "experimental" in the name.

The autoupgrader will handle legacy intrinsics.

Relevant ML thread: http://lists.llvm.org/pipermail/llvm-dev/2020-April/140729.html

Differential Revision: https://reviews.llvm.org/D88787
2020-10-07 10:36:44 -07:00
..
AffineToStandard
[mlir][AffineToStandard] Make LowerAffine pass Op-agnostic.
2020-07-27 12:14:17 -07:00
AVX512ToLLVM
…
GPUCommon
[mlir] Stop allowing LLVMType Int arguments for GPULaunchFuncOp.
2020-09-24 11:16:23 +02:00
GPUToCUDA
[mlir] switch the modeling of LLVM types to use the new mechanism
2020-08-04 14:29:25 +02:00
GPUToNVVM
Added std.floor operation to match std.ceil
2020-08-18 10:25:32 -07:00
GPUToROCDL
Added std.floor operation to match std.ceil
2020-08-18 10:25:32 -07:00
GPUToROCm
[mlir] switch the modeling of LLVM types to use the new mechanism
2020-08-04 14:29:25 +02:00
GPUToSPIRV
[spirv][nfc] Simplify resource limit with default values
2020-09-03 13:29:26 -04:00
GPUToVulkan
[mlir][GPUToVulkan] Fix signature of bindMemRef function for f16
2020-08-21 10:48:00 -07:00
LinalgToSPIRV
[mlir][Linalg] Uniformize linalg.generic with named ops.
2020-09-22 04:13:22 -04:00
LinalgToVector
[mlir][Linalg] Tile sizes for Conv ops vectorization added as pass arguments
2020-09-30 11:31:28 +00:00
OpenMPToLLVM
[OpenMP][MLIR] Conversion pattern for OpenMP to LLVM
2020-08-27 19:32:15 +01:00
SCFToGPU
[mlir][SCFToGPU] LaunchOp propagate optional attributes
2020-09-25 09:21:16 +02:00
SCFToStandard
[mlir] Refactor BoolAttr to be a special case of IntegerAttr
2020-06-04 16:41:24 -07:00
ShapeToStandard
[mlir][shape] Make conversion passes more consistent.
2020-09-28 14:55:42 -07:00
SPIRVToLLVM
[MLIR][SPIRVToLLVM] Conversion for composite extract and insert
2020-10-06 11:46:25 +03:00
StandardToLLVM
[mlir] Split alloc-like op LLVM lowerings into base and separate derived classes.
2020-10-05 17:36:01 +02:00
StandardToSPIRV
[mlir][StandardToSPIRV] Handle vector of i1 case for lowering zexti to SPIR-V.
2020-09-18 07:07:22 -07:00
VectorToLLVM
[llvm][mlir] Promote the experimental reduction intrinsics to be first class intrinsics.
2020-10-07 10:36:44 -07:00
VectorToROCDL
[mlir] switch the modeling of LLVM types to use the new mechanism
2020-08-04 14:29:25 +02:00
VectorToSCF
[mlir][VectorOps] Redo the scalar loop emission in VectoToSCF to pad instead of clipping
2020-09-08 11:15:25 +02:00
VectorToSPIRV
[mlir][spirv] Add Vector to SPIR-V conversion pass
2020-10-06 11:53:23 -07:00