
When using Greedy Register Allocation, there are times where early-clobber values are ignored, and assigned the same register. This is illeagal behaviour for these intructions. To get around this, using Pseudo instructions for early-clobber registers gives them a definition and allows Greedy to assign them to a different register. This then meets the ARM Architecture Reference Manual and matches the defined behaviour. This patch takes the existing RISC-V patch and makes it target independent, then adds support for the ARM Architecture. Doing this will ensure early-clobber restraints are followed when using the ARM Architecture. Making the pass target independent will also open up possibility that support other architectures can be added in the future.
284 lines
6.5 KiB
CMake
284 lines
6.5 KiB
CMake
if (DEFINED LLVM_HAVE_TF_AOT OR LLVM_HAVE_TFLITE)
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include(TensorFlowCompile)
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set(LLVM_RAEVICT_MODEL_PATH_DEFAULT "models/regalloc-eviction")
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set(LLVM_RAEVICT_MODEL_CURRENT_URL "<UNSPECIFIED>" CACHE STRING "URL to download the LLVM register allocator eviction model")
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if (DEFINED LLVM_HAVE_TF_AOT)
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tf_find_and_compile(
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${LLVM_RAEVICT_MODEL_PATH}
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${LLVM_RAEVICT_MODEL_CURRENT_URL}
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${LLVM_RAEVICT_MODEL_PATH_DEFAULT}
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"../Analysis/models/gen-regalloc-eviction-test-model.py"
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serve
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action
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RegAllocEvictModel
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llvm::RegAllocEvictModel
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)
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endif()
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if (LLVM_HAVE_TFLITE)
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list(APPEND MLLinkDeps ${tensorflow_c_api} ${tensorflow_fx})
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endif()
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endif()
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add_llvm_component_library(LLVMCodeGen
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AggressiveAntiDepBreaker.cpp
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AllocationOrder.cpp
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Analysis.cpp
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AssignmentTrackingAnalysis.cpp
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AtomicExpandPass.cpp
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BasicTargetTransformInfo.cpp
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BranchFolding.cpp
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BranchRelaxation.cpp
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BreakFalseDeps.cpp
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BasicBlockSections.cpp
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BasicBlockPathCloning.cpp
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BasicBlockSectionsProfileReader.cpp
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CalcSpillWeights.cpp
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CallBrPrepare.cpp
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CallingConvLower.cpp
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CFGuardLongjmp.cpp
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CFIFixup.cpp
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CFIInstrInserter.cpp
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CodeGen.cpp
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CodeGenCommonISel.cpp
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CodeGenPrepare.cpp
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CommandFlags.cpp
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ComplexDeinterleavingPass.cpp
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CriticalAntiDepBreaker.cpp
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DeadMachineInstructionElim.cpp
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DetectDeadLanes.cpp
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DFAPacketizer.cpp
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DwarfEHPrepare.cpp
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EarlyIfConversion.cpp
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EdgeBundles.cpp
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EHContGuardCatchret.cpp
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ExecutionDomainFix.cpp
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ExpandLargeDivRem.cpp
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ExpandLargeFpConvert.cpp
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ExpandMemCmp.cpp
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ExpandPostRAPseudos.cpp
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ExpandReductions.cpp
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ExpandVectorPredication.cpp
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FaultMaps.cpp
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FEntryInserter.cpp
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FinalizeISel.cpp
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FixupStatepointCallerSaved.cpp
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FreeMachineFunction.cpp
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FuncletLayout.cpp
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GCMetadata.cpp
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GCMetadataPrinter.cpp
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GCRootLowering.cpp
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GlobalMerge.cpp
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HardwareLoops.cpp
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IfConversion.cpp
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ImplicitNullChecks.cpp
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IndirectBrExpandPass.cpp
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InitUndef.cpp
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InlineSpiller.cpp
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InterferenceCache.cpp
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InterleavedAccessPass.cpp
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InterleavedLoadCombinePass.cpp
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IntrinsicLowering.cpp
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JMCInstrumenter.cpp
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KCFI.cpp
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LatencyPriorityQueue.cpp
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LazyMachineBlockFrequencyInfo.cpp
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LexicalScopes.cpp
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LiveDebugVariables.cpp
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LiveIntervals.cpp
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LiveInterval.cpp
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LiveIntervalUnion.cpp
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LivePhysRegs.cpp
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LiveRangeCalc.cpp
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LiveIntervalCalc.cpp
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LiveRangeEdit.cpp
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LiveRangeShrink.cpp
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LiveRegMatrix.cpp
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LiveRegUnits.cpp
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LiveStacks.cpp
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LiveVariables.cpp
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LLVMTargetMachine.cpp
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LocalStackSlotAllocation.cpp
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LoopTraversal.cpp
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LowLevelTypeUtils.cpp
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LowerEmuTLS.cpp
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MachineBasicBlock.cpp
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MachineBlockFrequencyInfo.cpp
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MachineBlockPlacement.cpp
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MachineBranchProbabilityInfo.cpp
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MachineCFGPrinter.cpp
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MachineCombiner.cpp
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MachineCopyPropagation.cpp
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MachineCSE.cpp
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MachineCheckDebugify.cpp
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MachineCycleAnalysis.cpp
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MachineDebugify.cpp
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MachineDominanceFrontier.cpp
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MachineDominators.cpp
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MachineFrameInfo.cpp
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MachineFunction.cpp
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MachineFunctionPass.cpp
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MachineFunctionPrinterPass.cpp
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MachineFunctionSplitter.cpp
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MachineInstrBundle.cpp
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MachineInstr.cpp
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MachineLateInstrsCleanup.cpp
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MachineLICM.cpp
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MachineLoopInfo.cpp
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MachineLoopUtils.cpp
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MachineModuleInfo.cpp
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MachineModuleInfoImpls.cpp
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MachineModuleSlotTracker.cpp
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MachineOperand.cpp
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MachineOptimizationRemarkEmitter.cpp
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MachineOutliner.cpp
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MachinePassManager.cpp
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MachinePipeliner.cpp
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MachinePostDominators.cpp
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MachineRegionInfo.cpp
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MachineRegisterInfo.cpp
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MachineScheduler.cpp
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MachineSink.cpp
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MachineSizeOpts.cpp
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MachineSSAContext.cpp
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MachineSSAUpdater.cpp
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MachineStripDebug.cpp
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MachineTraceMetrics.cpp
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MachineUniformityAnalysis.cpp
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MachineVerifier.cpp
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MIRFSDiscriminator.cpp
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MIRSampleProfile.cpp
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MIRYamlMapping.cpp
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MLRegAllocEvictAdvisor.cpp
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MLRegAllocPriorityAdvisor.cpp
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ModuloSchedule.cpp
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MultiHazardRecognizer.cpp
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PatchableFunction.cpp
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MBFIWrapper.cpp
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MIRPrinter.cpp
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MIRPrintingPass.cpp
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MacroFusion.cpp
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NonRelocatableStringpool.cpp
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OptimizePHIs.cpp
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ParallelCG.cpp
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PeepholeOptimizer.cpp
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PHIElimination.cpp
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PHIEliminationUtils.cpp
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PostRAHazardRecognizer.cpp
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PostRASchedulerList.cpp
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PreISelIntrinsicLowering.cpp
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ProcessImplicitDefs.cpp
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PrologEpilogInserter.cpp
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PseudoProbeInserter.cpp
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PseudoSourceValue.cpp
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RDFGraph.cpp
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RDFLiveness.cpp
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RDFRegisters.cpp
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ReachingDefAnalysis.cpp
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RegAllocBase.cpp
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RegAllocBasic.cpp
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RegAllocEvictionAdvisor.cpp
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RegAllocFast.cpp
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RegAllocGreedy.cpp
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RegAllocPBQP.cpp
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RegAllocPriorityAdvisor.cpp
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RegAllocScore.cpp
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RegisterClassInfo.cpp
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RegisterCoalescer.cpp
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RegisterPressure.cpp
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RegisterScavenging.cpp
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GCEmptyBasicBlocks.cpp
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RemoveRedundantDebugValues.cpp
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RenameIndependentSubregs.cpp
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MachineStableHash.cpp
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MIRVRegNamerUtils.cpp
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MIRNamerPass.cpp
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MIRCanonicalizerPass.cpp
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RegisterUsageInfo.cpp
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RegUsageInfoCollector.cpp
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RegUsageInfoPropagate.cpp
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ReplaceWithVeclib.cpp
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ResetMachineFunctionPass.cpp
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RegisterBank.cpp
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RegisterBankInfo.cpp
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SafeStack.cpp
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SafeStackLayout.cpp
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SanitizerBinaryMetadata.cpp
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ScheduleDAG.cpp
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ScheduleDAGInstrs.cpp
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ScheduleDAGPrinter.cpp
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ScoreboardHazardRecognizer.cpp
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SelectOptimize.cpp
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ShadowStackGCLowering.cpp
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ShrinkWrap.cpp
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SjLjEHPrepare.cpp
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SlotIndexes.cpp
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SpillPlacement.cpp
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SplitKit.cpp
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StackColoring.cpp
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StackFrameLayoutAnalysisPass.cpp
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StackMapLivenessAnalysis.cpp
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StackMaps.cpp
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StackProtector.cpp
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StackSlotColoring.cpp
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SwiftErrorValueTracking.cpp
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SwitchLoweringUtils.cpp
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TailDuplication.cpp
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TailDuplicator.cpp
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TargetFrameLoweringImpl.cpp
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TargetInstrInfo.cpp
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TargetLoweringBase.cpp
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TargetLoweringObjectFileImpl.cpp
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TargetOptionsImpl.cpp
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TargetPassConfig.cpp
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TargetRegisterInfo.cpp
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TargetSchedule.cpp
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TargetSubtargetInfo.cpp
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TwoAddressInstructionPass.cpp
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TypePromotion.cpp
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UnreachableBlockElim.cpp
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ValueTypes.cpp
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VLIWMachineScheduler.cpp
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VirtRegMap.cpp
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WasmEHPrepare.cpp
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WinEHPrepare.cpp
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XRayInstrumentation.cpp
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${GeneratedMLSources}
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LiveDebugValues/LiveDebugValues.cpp
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LiveDebugValues/VarLocBasedImpl.cpp
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LiveDebugValues/InstrRefBasedImpl.cpp
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ADDITIONAL_HEADER_DIRS
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${LLVM_MAIN_INCLUDE_DIR}/llvm/CodeGen
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${LLVM_MAIN_INCLUDE_DIR}/llvm/CodeGen/PBQP
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LINK_LIBS ${LLVM_PTHREAD_LIB} ${MLLinkDeps}
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DEPENDS
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intrinsics_gen
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${MLDeps}
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LINK_COMPONENTS
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Analysis
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BitReader
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BitWriter
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CodeGenTypes
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Core
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MC
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ObjCARC
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ProfileData
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Scalar
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Support
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Target
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TargetParser
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TransformUtils
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)
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add_subdirectory(SelectionDAG)
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add_subdirectory(AsmPrinter)
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add_subdirectory(MIRParser)
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add_subdirectory(GlobalISel)
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