5be7f2a943
Assemblers change certain relocations referencing a local symbol to reference the section symbol instead. This conversion is disabled for many conditions (`shouldRelocateWithSymbol`), e.g. TLS symbol, for most targets (including AArch32, x86, PowerPC, and RISC-V) GOT-generating relocations. However, AArch64 encodes the GOT-generating intent in MCValue::RefKind instead of MCSymbolRef::Kind (see commit 0999cbd0b9ed8aa893cce10d681dec6d54b200ad (2014)), therefore not affected by the code `case MCSymbolRefExpr::VK_GOT:`. As GNU ld and ld.lld create GOT entries based on the symbol, ignoring addend, the two ldr instructions will share the same GOT entry, which is not expected: ``` ldr x1, [x1, :got_lo12:x] // converted to .data+0 ldr x1, [x1, :got_lo12:y] // converted to .data+4 .data // .globl x, y would suppress STT_SECTION conversion x: .zero 4 y: .long 42 ``` This patch changes AArch64 to suppress local symbol to STT_SECTION conversion for GOT relocations, matching most other targets. x and y will use different GOT entries, which IMO is the most sensable behavior. With this change, the ABI decision on https://github.com/ARM-software/abi-aa/issues/217 will only affect relocations explicitly referencing STT_SECTION symbols, e.g. ``` ldr x1, [x1, :got_lo12:(.data+0)] ldr x1, [x1, :got_lo12:(.data+4)] // I consider this unreasonable uses ``` IMO all reasonable use cases are unaffected. Link: https://github.com/llvm/llvm-project/issues/63418 GNU assembler PR: https://sourceware.org/bugzilla/show_bug.cgi?id=30788 Reviewed By: peter.smith Differential Revision: https://reviews.llvm.org/D158577
152 lines
6.8 KiB
C++
152 lines
6.8 KiB
C++
//===-- SparcELFObjectWriter.cpp - Sparc ELF Writer -----------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "MCTargetDesc/SparcFixupKinds.h"
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#include "MCTargetDesc/SparcMCExpr.h"
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#include "MCTargetDesc/SparcMCTargetDesc.h"
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/MC/MCELFObjectWriter.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCObjectWriter.h"
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#include "llvm/MC/MCValue.h"
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#include "llvm/Support/ErrorHandling.h"
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using namespace llvm;
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namespace {
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class SparcELFObjectWriter : public MCELFObjectTargetWriter {
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public:
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SparcELFObjectWriter(bool Is64Bit, uint8_t OSABI)
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: MCELFObjectTargetWriter(Is64Bit, OSABI,
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Is64Bit ? ELF::EM_SPARCV9 : ELF::EM_SPARC,
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/*HasRelocationAddend*/ true) {}
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~SparcELFObjectWriter() override = default;
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protected:
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unsigned getRelocType(MCContext &Ctx, const MCValue &Target,
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const MCFixup &Fixup, bool IsPCRel) const override;
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bool needsRelocateWithSymbol(const MCValue &Val, const MCSymbol &Sym,
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unsigned Type) const override;
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};
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}
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unsigned SparcELFObjectWriter::getRelocType(MCContext &Ctx,
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const MCValue &Target,
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const MCFixup &Fixup,
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bool IsPCRel) const {
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MCFixupKind Kind = Fixup.getKind();
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if (Kind >= FirstLiteralRelocationKind)
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return Kind - FirstLiteralRelocationKind;
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if (const SparcMCExpr *SExpr = dyn_cast<SparcMCExpr>(Fixup.getValue())) {
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if (SExpr->getKind() == SparcMCExpr::VK_Sparc_R_DISP32)
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return ELF::R_SPARC_DISP32;
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}
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if (IsPCRel) {
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switch(Fixup.getTargetKind()) {
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default:
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llvm_unreachable("Unimplemented fixup -> relocation");
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case FK_Data_1: return ELF::R_SPARC_DISP8;
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case FK_Data_2: return ELF::R_SPARC_DISP16;
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case FK_Data_4: return ELF::R_SPARC_DISP32;
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case FK_Data_8: return ELF::R_SPARC_DISP64;
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case Sparc::fixup_sparc_call30: return ELF::R_SPARC_WDISP30;
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case Sparc::fixup_sparc_br22: return ELF::R_SPARC_WDISP22;
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case Sparc::fixup_sparc_br19: return ELF::R_SPARC_WDISP19;
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case Sparc::fixup_sparc_br16:
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return ELF::R_SPARC_WDISP16;
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case Sparc::fixup_sparc_pc22: return ELF::R_SPARC_PC22;
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case Sparc::fixup_sparc_pc10: return ELF::R_SPARC_PC10;
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case Sparc::fixup_sparc_wplt30: return ELF::R_SPARC_WPLT30;
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}
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}
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switch(Fixup.getTargetKind()) {
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default:
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llvm_unreachable("Unimplemented fixup -> relocation");
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case FK_NONE: return ELF::R_SPARC_NONE;
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case FK_Data_1: return ELF::R_SPARC_8;
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case FK_Data_2: return ((Fixup.getOffset() % 2)
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? ELF::R_SPARC_UA16
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: ELF::R_SPARC_16);
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case FK_Data_4: return ((Fixup.getOffset() % 4)
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? ELF::R_SPARC_UA32
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: ELF::R_SPARC_32);
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case FK_Data_8: return ((Fixup.getOffset() % 8)
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? ELF::R_SPARC_UA64
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: ELF::R_SPARC_64);
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case Sparc::fixup_sparc_13: return ELF::R_SPARC_13;
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case Sparc::fixup_sparc_hi22: return ELF::R_SPARC_HI22;
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case Sparc::fixup_sparc_lo10: return ELF::R_SPARC_LO10;
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case Sparc::fixup_sparc_h44: return ELF::R_SPARC_H44;
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case Sparc::fixup_sparc_m44: return ELF::R_SPARC_M44;
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case Sparc::fixup_sparc_l44: return ELF::R_SPARC_L44;
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case Sparc::fixup_sparc_hh: return ELF::R_SPARC_HH22;
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case Sparc::fixup_sparc_hm: return ELF::R_SPARC_HM10;
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case Sparc::fixup_sparc_lm: return ELF::R_SPARC_LM22;
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case Sparc::fixup_sparc_got22: return ELF::R_SPARC_GOT22;
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case Sparc::fixup_sparc_got10: return ELF::R_SPARC_GOT10;
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case Sparc::fixup_sparc_got13: return ELF::R_SPARC_GOT13;
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case Sparc::fixup_sparc_tls_gd_hi22: return ELF::R_SPARC_TLS_GD_HI22;
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case Sparc::fixup_sparc_tls_gd_lo10: return ELF::R_SPARC_TLS_GD_LO10;
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case Sparc::fixup_sparc_tls_gd_add: return ELF::R_SPARC_TLS_GD_ADD;
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case Sparc::fixup_sparc_tls_gd_call: return ELF::R_SPARC_TLS_GD_CALL;
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case Sparc::fixup_sparc_tls_ldm_hi22: return ELF::R_SPARC_TLS_LDM_HI22;
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case Sparc::fixup_sparc_tls_ldm_lo10: return ELF::R_SPARC_TLS_LDM_LO10;
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case Sparc::fixup_sparc_tls_ldm_add: return ELF::R_SPARC_TLS_LDM_ADD;
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case Sparc::fixup_sparc_tls_ldm_call: return ELF::R_SPARC_TLS_LDM_CALL;
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case Sparc::fixup_sparc_tls_ldo_hix22: return ELF::R_SPARC_TLS_LDO_HIX22;
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case Sparc::fixup_sparc_tls_ldo_lox10: return ELF::R_SPARC_TLS_LDO_LOX10;
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case Sparc::fixup_sparc_tls_ldo_add: return ELF::R_SPARC_TLS_LDO_ADD;
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case Sparc::fixup_sparc_tls_ie_hi22: return ELF::R_SPARC_TLS_IE_HI22;
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case Sparc::fixup_sparc_tls_ie_lo10: return ELF::R_SPARC_TLS_IE_LO10;
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case Sparc::fixup_sparc_tls_ie_ld: return ELF::R_SPARC_TLS_IE_LD;
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case Sparc::fixup_sparc_tls_ie_ldx: return ELF::R_SPARC_TLS_IE_LDX;
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case Sparc::fixup_sparc_tls_ie_add: return ELF::R_SPARC_TLS_IE_ADD;
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case Sparc::fixup_sparc_tls_le_hix22: return ELF::R_SPARC_TLS_LE_HIX22;
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case Sparc::fixup_sparc_tls_le_lox10: return ELF::R_SPARC_TLS_LE_LOX10;
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case Sparc::fixup_sparc_hix22: return ELF::R_SPARC_HIX22;
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case Sparc::fixup_sparc_lox10: return ELF::R_SPARC_LOX10;
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case Sparc::fixup_sparc_gotdata_hix22: return ELF::R_SPARC_GOTDATA_HIX22;
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case Sparc::fixup_sparc_gotdata_lox10: return ELF::R_SPARC_GOTDATA_LOX10;
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case Sparc::fixup_sparc_gotdata_op: return ELF::R_SPARC_GOTDATA_OP;
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}
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return ELF::R_SPARC_NONE;
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}
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bool SparcELFObjectWriter::needsRelocateWithSymbol(const MCValue &,
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const MCSymbol &,
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unsigned Type) const {
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switch (Type) {
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default:
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return false;
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// All relocations that use a GOT need a symbol, not an offset, as
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// the offset of the symbol within the section is irrelevant to
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// where the GOT entry is. Don't need to list all the TLS entries,
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// as they're all marked as requiring a symbol anyways.
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case ELF::R_SPARC_GOT10:
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case ELF::R_SPARC_GOT13:
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case ELF::R_SPARC_GOT22:
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case ELF::R_SPARC_GOTDATA_HIX22:
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case ELF::R_SPARC_GOTDATA_LOX10:
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case ELF::R_SPARC_GOTDATA_OP_HIX22:
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case ELF::R_SPARC_GOTDATA_OP_LOX10:
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return true;
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}
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}
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std::unique_ptr<MCObjectTargetWriter>
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llvm::createSparcELFObjectWriter(bool Is64Bit, uint8_t OSABI) {
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return std::make_unique<SparcELFObjectWriter>(Is64Bit, OSABI);
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}
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