d69033d245
Instead of checking the pointer type, check the element type of the GEP. Previously we ended up reusing GEP increments that were not in expanded form, thus not respecting LSRs choice of representation. The change in 2011-10-06-ReusePhi.ll recovers a regression that appeared when converting that test to opaque pointers. Changes in various Thumb tests now compute the step outside the loop instead of using add.w inside the loop, which is LSR's preferred representation for this target.
73 lines
3.6 KiB
LLVM
73 lines
3.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
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; RUN: opt -loop-reduce -S < %s | FileCheck %s
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;
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; Test LSR's intelligence regarding phi reuse.
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; Verify that scaled GEPs are not reused. rdar://5064068
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target triple = "x86_64-apple-darwin"
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; Provide legal integer types.
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target datalayout = "n8:16:32:64"
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define float @test(ptr nocapture %A, ptr nocapture %B, i32 %N, i32 %IA, i32 %IB) nounwind uwtable readonly ssp {
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; CHECK-LABEL: define float @test
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; CHECK-SAME: (ptr nocapture [[A:%.*]], ptr nocapture [[B:%.*]], i32 [[N:%.*]], i32 [[IA:%.*]], i32 [[IB:%.*]]) #[[ATTR0:[0-9]+]] {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP1:%.*]] = icmp sgt i32 [[N]], 0
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; CHECK-NEXT: br i1 [[CMP1]], label [[WHILE_BODY_LR_PH:%.*]], label [[WHILE_END:%.*]]
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; CHECK: while.body.lr.ph:
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; CHECK-NEXT: [[IDX_EXT:%.*]] = sext i32 [[IA]] to i64
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; CHECK-NEXT: [[IDX_EXT2:%.*]] = sext i32 [[IB]] to i64
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; CHECK-NEXT: [[TMP0:%.*]] = shl nsw i64 [[IDX_EXT]], 2
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; CHECK-NEXT: [[TMP1:%.*]] = shl nsw i64 [[IDX_EXT2]], 2
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; CHECK-NEXT: br label [[WHILE_BODY:%.*]]
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; CHECK: while.body:
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; CHECK-NEXT: [[LSR_IV1:%.*]] = phi ptr [ [[SCEVGEP2:%.*]], [[WHILE_BODY]] ], [ [[B]], [[WHILE_BODY_LR_PH]] ]
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; CHECK-NEXT: [[LSR_IV:%.*]] = phi ptr [ [[SCEVGEP:%.*]], [[WHILE_BODY]] ], [ [[A]], [[WHILE_BODY_LR_PH]] ]
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; CHECK-NEXT: [[N_ADDR_03:%.*]] = phi i32 [ [[N]], [[WHILE_BODY_LR_PH]] ], [ [[SUB:%.*]], [[WHILE_BODY]] ]
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; CHECK-NEXT: [[SUM0_02:%.*]] = phi float [ 0.000000e+00, [[WHILE_BODY_LR_PH]] ], [ [[ADD:%.*]], [[WHILE_BODY]] ]
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; CHECK-NEXT: [[TMP2:%.*]] = load float, ptr [[LSR_IV]], align 4
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; CHECK-NEXT: [[TMP3:%.*]] = load float, ptr [[LSR_IV1]], align 4
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; CHECK-NEXT: [[MUL:%.*]] = fmul float [[TMP2]], [[TMP3]]
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; CHECK-NEXT: [[ADD]] = fadd float [[SUM0_02]], [[MUL]]
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; CHECK-NEXT: [[SUB]] = add nsw i32 [[N_ADDR_03]], -1
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; CHECK-NEXT: [[SCEVGEP]] = getelementptr i8, ptr [[LSR_IV]], i64 [[TMP0]]
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; CHECK-NEXT: [[SCEVGEP2]] = getelementptr i8, ptr [[LSR_IV1]], i64 [[TMP1]]
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; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[SUB]], 0
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; CHECK-NEXT: br i1 [[CMP]], label [[WHILE_BODY]], label [[WHILE_END_LOOPEXIT:%.*]]
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; CHECK: while.end.loopexit:
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; CHECK-NEXT: br label [[WHILE_END]]
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; CHECK: while.end:
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; CHECK-NEXT: [[SUM0_0_LCSSA:%.*]] = phi float [ 0.000000e+00, [[ENTRY:%.*]] ], [ [[ADD]], [[WHILE_END_LOOPEXIT]] ]
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; CHECK-NEXT: ret float [[SUM0_0_LCSSA]]
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;
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entry:
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%cmp1 = icmp sgt i32 %N, 0
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br i1 %cmp1, label %while.body.lr.ph, label %while.end
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while.body.lr.ph: ; preds = %entry
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%idx.ext = sext i32 %IA to i64
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%idx.ext2 = sext i32 %IB to i64
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br label %while.body
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while.body: ; preds = %while.body.lr.ph, %while.body
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%A.addr.05 = phi ptr [ %A, %while.body.lr.ph ], [ %add.ptr, %while.body ]
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%B.addr.04 = phi ptr [ %B, %while.body.lr.ph ], [ %add.ptr3, %while.body ]
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%N.addr.03 = phi i32 [ %N, %while.body.lr.ph ], [ %sub, %while.body ]
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%Sum0.02 = phi float [ 0.000000e+00, %while.body.lr.ph ], [ %add, %while.body ]
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%0 = load float, ptr %A.addr.05, align 4
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%1 = load float, ptr %B.addr.04, align 4
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%mul = fmul float %0, %1
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%add = fadd float %Sum0.02, %mul
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%add.ptr = getelementptr inbounds float, ptr %A.addr.05, i64 %idx.ext
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%add.ptr3 = getelementptr inbounds float, ptr %B.addr.04, i64 %idx.ext2
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%sub = add nsw i32 %N.addr.03, -1
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%cmp = icmp sgt i32 %sub, 0
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br i1 %cmp, label %while.body, label %while.end
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while.end: ; preds = %while.body, %entry
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%Sum0.0.lcssa = phi float [ 0.000000e+00, %entry ], [ %add, %while.body ]
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ret float %Sum0.0.lcssa
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}
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