0819a6416f
In SelectionDAGBuilder always translate the fshl and fshr intrinsics to FSHL and FSHR (or ROTL and ROTR) instead of lowering them to shifts and ORs. Improve the legalization of FSHL and FSHR to avoid code quality regressions. Differential Revision: https://reviews.llvm.org/D77152
65 lines
2.1 KiB
C++
65 lines
2.1 KiB
C++
//===---- RISCVISelDAGToDAG.h - A dag to dag inst selector for RISCV ------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines an instruction selector for the RISCV target.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_RISCV_RISCVISELDAGTODAG_H
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#define LLVM_LIB_TARGET_RISCV_RISCVISELDAGTODAG_H
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#include "RISCV.h"
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#include "RISCVTargetMachine.h"
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#include "llvm/CodeGen/SelectionDAGISel.h"
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// RISCV-specific code to select RISCV machine instructions for
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// SelectionDAG operations.
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namespace llvm {
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class RISCVDAGToDAGISel : public SelectionDAGISel {
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const RISCVSubtarget *Subtarget = nullptr;
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public:
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explicit RISCVDAGToDAGISel(RISCVTargetMachine &TargetMachine)
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: SelectionDAGISel(TargetMachine) {}
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StringRef getPassName() const override {
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return "RISCV DAG->DAG Pattern Instruction Selection";
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}
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bool runOnMachineFunction(MachineFunction &MF) override {
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Subtarget = &MF.getSubtarget<RISCVSubtarget>();
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return SelectionDAGISel::runOnMachineFunction(MF);
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}
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void PostprocessISelDAG() override;
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void Select(SDNode *Node) override;
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bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID,
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std::vector<SDValue> &OutOps) override;
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bool SelectAddrFI(SDValue Addr, SDValue &Base);
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bool SelectSLOI(SDValue N, SDValue &RS1, SDValue &Shamt);
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bool SelectSROI(SDValue N, SDValue &RS1, SDValue &Shamt);
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bool SelectRORI(SDValue N, SDValue &RS1, SDValue &Shamt);
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bool SelectSLLIUW(SDValue N, SDValue &RS1, SDValue &Shamt);
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bool SelectSLOIW(SDValue N, SDValue &RS1, SDValue &Shamt);
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bool SelectSROIW(SDValue N, SDValue &RS1, SDValue &Shamt);
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bool SelectRORIW(SDValue N, SDValue &RS1, SDValue &Shamt);
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// Include the pieces autogenerated from the target description.
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#include "RISCVGenDAGISel.inc"
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private:
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void doPeepholeLoadStoreADDI();
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};
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}
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#endif
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