Krzysztof Parzyszek bb877d1af2 [Hexagon] Widen loads and handle any-/sign-/zero-extensions

2020-09-14 18:10:23 -05:00

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AArch64

[GISel]: Add combine for G_FABS to G_FABS

2020-09-14 15:56:24 -07:00

AMDGPU

[SelectionDAG] Use Align/MaybeAlign in calls to getLoad/getStore/getExtLoad/getTruncStore.

2020-09-14 13:54:50 -07:00

ARC

[ARC] Update brcc test.

2020-08-28 17:07:25 -07:00

ARM

[Legalize][ARM][X86] Add float legalization for VECREDUCE

2020-09-14 20:42:09 +02:00

AVR

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BPF

BPF: add a SimplifyCFG IR pass during generic Scalar/IPO optimization

2020-08-06 13:16:00 -07:00

Generic

[Intrinsics] define semantics for experimental fmax/fmin vector reductions

2020-09-12 09:10:28 -04:00

Hexagon

[Hexagon] Widen loads and handle any-/sign-/zero-extensions

2020-09-14 18:10:23 -05:00

Inputs

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Lanai

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Mips

[GlobalISel][IRTranslator] Generate better conditional branch lowering.

2020-09-09 13:16:11 -07:00

MIR

[MIRVRegNamer] Experimental MachineInstr stable hashing (Fowler-Noll-Vo)

2020-09-03 16:13:09 -04:00

MSP430

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NVPTX

[NVPTX] Fix typo in lit test

2020-08-17 16:02:11 -04:00

PowerPC

[SelectionDAG] Use Align/MaybeAlign in calls to getLoad/getStore/getExtLoad/getTruncStore.

2020-09-14 13:54:50 -07:00

RISCV

[RISC-V] ADDI/ORI/XORI x, 0 should be as cheap as a move

2020-08-27 10:32:22 +01:00

SPARC

[Sparc] Add reduced funnel shift test case for PR47303

2020-09-07 16:17:31 +01:00

SystemZ

[SelectionDAGBuilder] Pass fast math flags to getNode calls rather than trying to set them after the fact.:

2020-09-08 15:27:21 -07:00

Thumb

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Thumb2

[ARM] Selects SSAT/USAT from correct LLVM IR

2020-09-14 10:58:21 +00:00

VE

[VE] Support f128

2020-08-17 17:26:52 +09:00

WebAssembly

[WebAssembly] Fix fixEndsAtEndOfFunction for try-catch

2020-09-08 09:27:40 -07:00

WinCFGuard

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WinEH

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X86

[FastISel] Bail out of selectGetElementPtr for vector GEPs.

2020-09-14 12:53:06 -07:00

XCore

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