20177c45db
Private members of VPlanTransforms are only used inside VPlanTransforms.cpp, just make them static.
106 lines
4.8 KiB
C++
106 lines
4.8 KiB
C++
//===- VPlanTransforms.h - Utility VPlan to VPlan transforms --------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// This file provides utility VPlan to VPlan transformations.
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_TRANSFORMS_VECTORIZE_VPLANTRANSFORMS_H
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#define LLVM_TRANSFORMS_VECTORIZE_VPLANTRANSFORMS_H
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#include "VPlan.h"
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#include "llvm/ADT/STLFunctionalExtras.h"
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namespace llvm {
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class InductionDescriptor;
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class Instruction;
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class PHINode;
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class ScalarEvolution;
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class PredicatedScalarEvolution;
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class TargetLibraryInfo;
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class VPBuilder;
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struct VPlanTransforms {
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/// Replaces the VPInstructions in \p Plan with corresponding
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/// widen recipes.
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static void
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VPInstructionsToVPRecipes(VPlanPtr &Plan,
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function_ref<const InductionDescriptor *(PHINode *)>
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GetIntOrFpInductionDescriptor,
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ScalarEvolution &SE, const TargetLibraryInfo &TLI);
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/// Sink users of fixed-order recurrences after the recipe defining their
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/// previous value. Then introduce FirstOrderRecurrenceSplice VPInstructions
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/// to combine the value from the recurrence phis and previous values. The
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/// current implementation assumes all users can be sunk after the previous
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/// value, which is enforced by earlier legality checks.
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/// \returns true if all users of fixed-order recurrences could be re-arranged
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/// as needed or false if it is not possible. In the latter case, \p Plan is
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/// not valid.
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static bool adjustFixedOrderRecurrences(VPlan &Plan, VPBuilder &Builder);
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/// Clear NSW/NUW flags from reduction instructions if necessary.
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static void clearReductionWrapFlags(VPlan &Plan);
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/// Optimize \p Plan based on \p BestVF and \p BestUF. This may restrict the
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/// resulting plan to \p BestVF and \p BestUF.
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static void optimizeForVFAndUF(VPlan &Plan, ElementCount BestVF,
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unsigned BestUF,
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PredicatedScalarEvolution &PSE);
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/// Apply VPlan-to-VPlan optimizations to \p Plan, including induction recipe
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/// optimizations, dead recipe removal, replicate region optimizations and
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/// block merging.
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static void optimize(VPlan &Plan, ScalarEvolution &SE);
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/// Wrap predicated VPReplicateRecipes with a mask operand in an if-then
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/// region block and remove the mask operand. Optimize the created regions by
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/// iteratively sinking scalar operands into the region, followed by merging
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/// regions until no improvements are remaining.
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static void createAndOptimizeReplicateRegions(VPlan &Plan);
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/// Replace (ICMP_ULE, wide canonical IV, backedge-taken-count) checks with an
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/// (active-lane-mask recipe, wide canonical IV, trip-count). If \p
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/// UseActiveLaneMaskForControlFlow is true, introduce an
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/// VPActiveLaneMaskPHIRecipe. If \p DataAndControlFlowWithoutRuntimeCheck is
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/// true, no minimum-iteration runtime check will be created (during skeleton
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/// creation) and instead it is handled using active-lane-mask. \p
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/// DataAndControlFlowWithoutRuntimeCheck implies \p
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/// UseActiveLaneMaskForControlFlow.
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static void addActiveLaneMask(VPlan &Plan,
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bool UseActiveLaneMaskForControlFlow,
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bool DataAndControlFlowWithoutRuntimeCheck);
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/// Insert truncates and extends for any truncated recipe. Redundant casts
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/// will be folded later.
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static void
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truncateToMinimalBitwidths(VPlan &Plan,
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const MapVector<Instruction *, uint64_t> &MinBWs,
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LLVMContext &Ctx);
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/// Drop poison flags from recipes that may generate a poison value that is
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/// used after vectorization, even when their operands are not poison. Those
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/// recipes meet the following conditions:
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/// * Contribute to the address computation of a recipe generating a widen
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/// memory load/store (VPWidenMemoryInstructionRecipe or
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/// VPInterleaveRecipe).
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/// * Such a widen memory load/store has at least one underlying Instruction
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/// that is in a basic block that needs predication and after vectorization
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/// the generated instruction won't be predicated.
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/// Uses \p BlockNeedsPredication to check if a block needs predicating.
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/// TODO: Replace BlockNeedsPredication callback with retrieving info from
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/// VPlan directly.
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static void dropPoisonGeneratingRecipes(
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VPlan &Plan, function_ref<bool(BasicBlock *)> BlockNeedsPredication);
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};
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} // namespace llvm
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#endif // LLVM_TRANSFORMS_VECTORIZE_VPLANTRANSFORMS_H
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