db158c7c83
Refresh of the generic scheduling model to use A510 instead of A55. Main benefits are to the little core, and introducing SVE scheduling information. Changes tested on various OoO cores, no performance degradation is seen. Differential Revision: https://reviews.llvm.org/D156799
19 lines
656 B
LLVM
19 lines
656 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=aarch64-apple-darwin -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s
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; Test that we don't segfault.
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define void @test(i64 %a, ptr %b) {
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; CHECK-LABEL: test:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: ldr x8, [x1]
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; CHECK-NEXT: and x9, x0, #0x7fffffffffffffff
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; CHECK-NEXT: str x8, [x9]
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; CHECK-NEXT: ret
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%1 = and i64 %a, 9223372036854775807
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%2 = inttoptr i64 %1 to ptr
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call void @llvm.memcpy.p0.p0.i64(ptr align 8 %2, ptr align 8 %b, i64 8, i1 false)
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ret void
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}
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declare void @llvm.memcpy.p0.p0.i64(ptr, ptr, i64, i1)
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