shylie/llvm-project
1
0
Fork 0
Code Issues Pull Requests Actions 6 Packages Projects Releases Wiki Activity
llvm-project/llvm/test/CodeGen
History
Matt Arsenault bcb643c8af AMDGPU/GlobalISel: Handle image atomics
2020-03-30 17:41:04 -04:00
..
AArch64
GlobalISel: Translate llvm.fshl/llvm.fshr
2020-03-30 11:34:42 -07:00
AMDGPU
AMDGPU/GlobalISel: Handle image atomics
2020-03-30 17:41:04 -04:00
ARC
…
ARM
[ARM] Move ConstantIsland and LowOverheadLoops Passes.
2020-03-25 16:49:21 +01:00
AVR
[AVR] Fix incorrect register state for LDRdPtr
2020-03-03 17:34:54 +08:00
BPF
[BPF] support 128bit int explicitly in layout spec
2020-03-28 11:46:29 -07:00
Generic
[X86] Move combineLoopMAddPattern and combineLoopSADPattern to an IR pass before SelecitonDAG.
2020-03-26 14:10:20 -07:00
Hexagon
Revert "Include static prof data when collecting loop BBs"
2020-03-24 09:41:16 -07:00
Inputs
…
Lanai
Revert "Revert "Reland "[Support] make report_fatal_error abort instead of exit"""
2020-02-13 10:16:06 -08:00
Mips
[GlobalISel] combine G_TRUNC with G_MERGE_VALUES
2020-03-16 14:42:01 +01:00
MIR
[AMDGPU] Move frame pointer from s34 to s33
2020-03-19 15:35:16 -04:00
MSP430
…
NVPTX
CodeGen: Add -denormal-fp-math-f32 flag
2020-03-27 14:00:39 -07:00
PowerPC
[NFC] [PowerPC] Update and add tests for ori
2020-03-30 17:46:12 +08:00
RISCV
[RISCV] Support llvm.thread.pointer
2020-03-27 17:30:12 -07:00
SPARC
[Sparc] Fix incorrect operand for matching CMPri pattern
2020-03-02 11:36:32 +08:00
SystemZ
[SystemZ] Improve foldMemoryOperandImpl()
2020-03-25 16:21:08 +01:00
Thumb
[DAGCombine] Skip PostInc combine with later users
2020-03-23 08:39:53 +00:00
Thumb2
[ARM][LowOverheadLoops] Add horizontal reduction support
2020-03-30 09:55:41 +01:00
VE
[VE] Target-specific bit size for sjljehprepare
2020-03-10 17:51:16 +01:00
WebAssembly
[WebAssembly] Fix the order of destructors in the LowerGlobalDtors pass.
2020-03-26 16:19:02 -07:00
WinCFGuard
…
WinEH
…
X86
[X86] make sure POP has implicit def/use of stack pointer when materializing 8-bit immediates for minsize
2020-03-30 09:25:31 -07:00
XCore
[XCore] Add instruction pattern for bitrev
2020-02-21 09:28:49 +08:00