89503bda38
Implements a structural stall heuristic that considers both resource hazards and latency constraints when selecting instructions. In coexec, this changes the pending queue from a binary “not ready to issue” distinction into part of a unified candidate comparison. Pending instructions still identify structural stalls in the current cycle, but they are now evaluated directly against available instructions by stall cost, making the heuristics both more intuitive and more expressive. - Add getStructuralStallCycles() to GCNSchedStrategy that computes the number of cycles an instruction must wait due to: - Resource conflicts on unbuffered resources (from the SchedModel) - Sequence-dependent hazards (from GCNHazardRecognizer) - Add getHazardWaitStates() to GCNHazardRecognizer that returns the number of wait states until all hazards for an instruction are resolved, providing cycle-accurate hazard information for scheduling heuristics.
49 lines
1.8 KiB
C++
49 lines
1.8 KiB
C++
//===- AMDGPUCoExecSchedStrategy.h - CoExec Scheduling Strategy -*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file
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/// Coexecution-focused scheduling strategy for AMDGPU.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUCOEXECSCHEDSTRATEGY_H
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#define LLVM_LIB_TARGET_AMDGPU_AMDGPUCOEXECSCHEDSTRATEGY_H
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#include "GCNSchedStrategy.h"
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#include "llvm/CodeGen/MachineScheduler.h"
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namespace llvm {
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class AMDGPUCoExecSchedStrategy final : public GCNSchedStrategy {
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protected:
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bool tryCandidate(SchedCandidate &Cand, SchedCandidate &TryCand,
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SchedBoundary *Zone) const override;
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bool tryEffectiveStall(SchedCandidate &Cand, SchedCandidate &TryCand,
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SchedBoundary &Zone) const;
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void pickNodeFromQueue(SchedBoundary &Zone, const CandPolicy &ZonePolicy,
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const RegPressureTracker &RPTracker,
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SchedCandidate &Cand, bool &PickedPending,
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bool IsBottomUp);
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public:
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AMDGPUCoExecSchedStrategy(const MachineSchedContext *C);
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void initPolicy(MachineBasicBlock::iterator Begin,
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MachineBasicBlock::iterator End,
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unsigned NumRegionInstrs) override;
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void initialize(ScheduleDAGMI *DAG) override;
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SUnit *pickNode(bool &IsTopNode) override;
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};
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ScheduleDAGInstrs *createGCNCoExecMachineScheduler(MachineSchedContext *C);
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ScheduleDAGInstrs *createGCNNoopPostMachineScheduler(MachineSchedContext *C);
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} // End namespace llvm
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#endif // LLVM_LIB_TARGET_AMDGPU_AMDGPUCOEXECSCHEDSTRATEGY_H
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