a704195054
When rematerializing S_MOV_B64 or S_MOV_B64_IMM_PSEUDO and only a single 32-bit lane of the result is used at the remat point, emit S_MOV_B32 with the appropriate half of the 64-bit immediate instead. This reduces register pressure by defining a 32-bit register instead of a 64-bit pair when the other half is unused.
66 lines
2.7 KiB
YAML
66 lines
2.7 KiB
YAML
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -verify-machineinstrs --stress-regalloc=2 -start-before=greedy -stop-after=virtregrewriter \
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# RUN: %s -o - | FileCheck %s
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# Test that S_MOV_B64 rematerialization is shrunk to S_MOV_B32 when only a
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# single 32-bit subreg of the defined value is used at the remat point.
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# CHECK-LABEL: name: remat_shrink_s_mov_b64
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---
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name: remat_shrink_s_mov_b64
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $sgpr8_sgpr9
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%0:sreg_64_xexec = COPY $sgpr8_sgpr9
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; 0x0000002A_00000539: Lo_32 = 1337, Hi_32 = 42
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undef %1.sub0_sub1:sgpr_128 = S_MOV_B64 180388627769
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; 0x00000007_00000065: Lo_32 = 101, Hi_32 = 7
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undef %2.sub0_sub1:sgpr_128 = S_MOV_B64 30064771173
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%2.sub2_sub3:sgpr_128 = S_MOV_B64 2
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undef %3.sub2_sub3:sgpr_128 = S_MOV_B64 30064771173
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undef %4.sub2_sub3:sgpr_128 = S_MOV_B64 180388627769
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undef %5.sub0_sub1:sgpr_128 = S_MOV_B64 180388627769
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%6:sreg_64 = S_MOV_B64_IMM_PSEUDO 65536
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S_NOP 0, implicit %1.sub0
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S_NOP 0, implicit %1.sub1
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; CHECK: S_NOP 0, implicit-def $sgpr0_sgpr1
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S_NOP 0, implicit-def $sgpr0_sgpr1, implicit-def $sgpr2_sgpr3, implicit-def $sgpr4_sgpr5, implicit-def $sgpr6_sgpr7
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; %2: uses both sub0 and sub1 - no shrink expected.
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S_NOP 0, implicit %2.sub0
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S_NOP 0, implicit %2.sub1
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; %1: both lanes used after barrier, rematerialized as S_MOV_B64, not shrunk.
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; CHECK: renamable $[[REG1LO:sgpr[0-9]+]]_[[REG1HI:sgpr[0-9]+]] = S_MOV_B64 180388627769
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; CHECK-NEXT: S_NOP 0, implicit renamable $[[REG1HI]]
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; CHECK-NEXT: S_NOP 0, implicit killed renamable $[[REG1LO]]
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S_NOP 0, implicit %1.sub1
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S_NOP 0, implicit %1.sub0
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; %3: only sub3 used - shrink to S_MOV_B32 with Hi_32(0x0000000700000065) = 7.
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; CHECK: renamable $[[REG3:sgpr[0-9]+]] = S_MOV_B32 7
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; CHECK-NEXT: S_NOP 0, implicit renamable $[[REG3]]
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; CHECK-NEXT: S_NOP 0, implicit killed renamable $[[REG3]]
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S_NOP 0, implicit %3.sub3
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S_NOP 0, implicit %3.sub3
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; %4: only sub2 used - shrink to S_MOV_B32 with Lo_32(0x0000002A00000539) = 1337.
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; CHECK: renamable $[[REG4:sgpr[0-9]+]] = S_MOV_B32 1337
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; CHECK-NEXT: S_NOP 0, implicit killed renamable $[[REG4]]
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S_NOP 0, implicit %4.sub2
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; %5: sub0_sub1 def, only sub1 used - shrink to S_MOV_B32 with Hi_32(0x0000002A00000539) = 42.
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; CHECK: renamable $[[REG5:sgpr[0-9]+]] = S_MOV_B32 42
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; CHECK-NEXT: S_NOP 0, implicit killed renamable $[[REG5]]
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S_NOP 0, implicit %5.sub1
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; CHECK: renamable $[[REG6:sgpr[0-9]+]] = S_MOV_B32 65536
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; CHECK-NEXT: S_NOP 0, implicit killed renamable $[[REG6]]
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S_NOP 0, implicit %6.sub0
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; CHECK: S_ENDPGM 0
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S_ENDPGM 0, implicit %0, implicit %1.sub0
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...
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