Simon Pilgrim bd3bde8900 [X86] mfence.ll - add COMMON prefix + replace X32 with X86 prefix ...

We try to only use X32 for gnux32 triple

Noticed while reviewing #106555

2025-03-07 10:44:24 +00:00

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AArch64

Revert "[AArch64][SVE] Improve fixed-length addressing modes." (#130263)

2025-03-07 09:35:55 +00:00

AMDGPU

[AMDGPU] Add safe-smem-prefetch SubtargetFeature off by default (#130050)

2025-03-07 11:10:21 +01:00

ARC

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ARM

[win] NFC: Rename EHCatchret to EHCont to allow for EH Continuation targets that aren't catchret instructions (#129953)

2025-03-06 09:28:44 -08:00

AVR

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BPF

[BPF] Add load-acquire and store-release instructions under -mcpu=v4 (#108636)

2025-03-04 09:19:39 -08:00

CSKY

[CSKY] Update fp16-promote.ll test (NFC)

2025-03-05 12:42:32 +01:00

DirectX

[DirectX] Match DXC when storing RWBuffer<float> (#129911)

2025-03-06 13:18:06 -08:00

Generic

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Hexagon

[HEXAGON] Fix hvx-isel for extract_subvector op (#129672)

2025-03-06 17:02:10 -06:00

Inputs

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Lanai

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LoongArch

[LoongArch] Relax the restrictions of inlineasm operand modifier 'u' and 'w' (#129864)

2025-03-06 16:17:12 +08:00

M68k

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Mips

[Mips] Reserve hardware register HWR2 (#127775)

2025-02-20 20:53:30 +08:00

MIR

[win] NFC: Rename EHCatchret to EHCont to allow for EH Continuation targets that aren't catchret instructions (#129953)

2025-03-06 09:28:44 -08:00

MLRegAlloc

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MSP430

[SelectionDAG] Utilizing target hook convertSelectOfConstantsToMath for SelectwithConstant (#127599)

2025-02-25 20:32:24 +05:30

NVPTX

[win] NFC: Rename EHCatchret to EHCont to allow for EH Continuation targets that aren't catchret instructions (#129953)

2025-03-06 09:28:44 -08:00

PowerPC

[win] NFC: Rename EHCatchret to EHCont to allow for EH Continuation targets that aren't catchret instructions (#129953)

2025-03-06 09:28:44 -08:00

RISCV

[RISCV] Generate MIPS load/store pair instructions (#124717)

2025-03-07 09:21:36 +01:00

SPARC

[CodeGen] Use __extendhfsf2 and __truncsfhf2 by default (#126880)

2025-02-19 10:16:57 +01:00

SPIRV

[SPIR-V] Add SPV_INTEL_memory_access_aliasing extension (#129800)

2025-03-06 19:44:21 +01:00

SystemZ

[CodeGen][NPM] Port ExpandPostRAPseudos to NPM (#129509)

2025-03-04 11:49:09 +05:30

Thumb

[RegAlloc][NewPM] Plug Greedy RA in codegen pipeline (#120557)

2025-03-03 11:06:15 +05:30

Thumb2

[CodeGen] Combine two loops in SlotIndexes.cpp file (#127631)

2025-03-07 08:17:23 +07:00

VE

[CodeGen] Use __extendhfsf2 and __truncsfhf2 by default (#126880)

2025-02-19 10:16:57 +01:00

WebAssembly

[WebAssembly] Add Libcall signatures for modf and variants (#130201)

2025-03-06 15:48:39 -08:00

WinCFGuard

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WinEH

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X86

[X86] mfence.ll - add COMMON prefix + replace X32 with X86 prefix

2025-03-07 10:44:24 +00:00

XCore

Revert "[MC] output inlined-at debug info (#106230)"

2025-03-07 09:45:15 +01:00

Xtensa

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