Vladislav Khmelevsky af9bdcfc46 [BOLT] Align constant islands to 8 bytes ...

AArch64 requires CI to be aligned to 8 bytes due to access instructions
restrictions. E.g. the ldr with imm, where imm must be aligned to 8 bytes.

Differential Revision: https://reviews.llvm.org/D122065

2022-03-27 22:30:42 +03:00

..

Inputs

[BOLT] Update dynamic relocations from section relocations

2022-02-16 18:40:54 +03:00

adrrelaxationpass.s

[BOLT] Align constant islands to 8 bytes

2022-03-27 22:30:42 +03:00

constant-island-relocations.s

[PR] Handle relocations in constant islands

2021-10-04 19:05:18 +03:00

controlflow.s

[PR] AArch64: Add TSTBR14 and CONDB19 relocations support

2021-10-03 13:41:41 +03:00

iplt.c

[BOLT] Handle ifuncs trampolines for aarch64

2022-03-09 01:38:19 +03:00

issue177.s

[PR][BOLT][TEST] Fix tests

2021-10-11 11:15:08 +03:00

lit.local.cfg

[PR][BOLT][TEST] Fix tests

2021-10-11 11:15:08 +03:00

plt.c

[BOLT] Enable PLT analysis for aarch64

2022-03-02 22:14:48 +03:00

runtime_relocs.c

[BOLT] Update dynamic relocations from section relocations

2022-02-16 18:40:54 +03:00