979d876bb4
We have some discission in D99152 and llvm-dev and finially come up with a solution to add amx specific cast intrinsics. We've support the intrinsics in llvm IR. This patch is to replace bitcast with amx cast intrinsics in code emitting in FE. Differential Revision: https://reviews.llvm.org/D122567
105 lines
4.0 KiB
C
105 lines
4.0 KiB
C
// RUN: %clang_cc1 %s -flax-vector-conversions=none -ffreestanding -triple=x86_64-unknown-unknown -target-feature +avx512f -target-feature +amx-int8 \
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// RUN: -target-feature +amx-bf16 -emit-llvm -o - -Werror -pedantic | FileCheck %s --check-prefixes=CHECK
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#include <immintrin.h>
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char buf[1024];
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#define STRIDE 32
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char buf2[1024];
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// This is an example code and integration test.
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void test_api(int cond, short row, short col) {
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//CHECK-LABEL: @test_api
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//CHECK-DAG: call x86_amx @llvm.x86.tileloadd64.internal
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//CHECK-DAG: call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx {{%.*}})
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//CHECK-DAG: call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> {{%.*}})
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//CHECK-DAG: call x86_amx @llvm.x86.tdpbssd.internal
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//CHECK-DAG: call void @llvm.x86.tilestored64.internal
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__tile1024i a = {row, 8};
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__tile1024i b = {8, col};
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__tile1024i c = {row, col};
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if (cond) {
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__tile_loadd(&a, buf, STRIDE);
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__tile_loadd(&b, buf, STRIDE);
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__tile_loadd(&c, buf, STRIDE);
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} else {
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__tile_loadd(&a, buf2, STRIDE);
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__tile_loadd(&b, buf2, STRIDE);
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__tile_loadd(&c, buf2, STRIDE);
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}
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__tile_dpbssd(&c, a, b);
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__tile_stored(buf, STRIDE, c);
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}
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void test_tile_loadd(short row, short col) {
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//CHECK-LABEL: @test_tile_loadd
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//CHECK-DAG: call x86_amx @llvm.x86.tileloadd64.internal
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//CHECK-DAG: call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx {{%.*}})
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__tile1024i a = {row, col};
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__tile_loadd(&a, buf, STRIDE);
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}
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void test_tile_stream_loadd(short row, short col) {
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//CHECK-LABEL: @test_tile_stream_loadd
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//CHECK-DAG: call x86_amx @llvm.x86.tileloaddt164.internal
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//CHECK-DAG: call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx {{%.*}})
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__tile1024i a = {row, col};
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__tile_stream_loadd(&a, buf, STRIDE);
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}
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void test_tile_dpbssd(__tile1024i a, __tile1024i b, __tile1024i c) {
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//CHECK-LABEL: @test_tile_dpbssd
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//CHECK-DAG: call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> {{%.*}})
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//CHECK-DAG: call x86_amx @llvm.x86.tdpbssd.internal
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//CHECK-DAG: call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx {{%.*}})
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__tile_dpbssd(&c, a, b);
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}
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void test_tile_dpbsud(__tile1024i a, __tile1024i b, __tile1024i c) {
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//CHECK-LABEL: @test_tile_dpbsud
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//CHECK-DAG: call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> {{%.*}})
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//CHECK-DAG: call x86_amx @llvm.x86.tdpbsud.internal
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//CHECK-DAG: call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx {{%.*}})
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__tile_dpbsud(&c, a, b);
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}
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void test_tile_dpbusd(__tile1024i a, __tile1024i b, __tile1024i c) {
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//CHECK-LABEL: @test_tile_dpbusd
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//CHECK-DAG: call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> {{%.*}})
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//CHECK-DAG: call x86_amx @llvm.x86.tdpbusd.internal
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//CHECK-DAG: call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx {{%.*}})
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__tile_dpbusd(&c, a, b);
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}
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void test_tile_dpbuud(__tile1024i a, __tile1024i b, __tile1024i c) {
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//CHECK-LABEL: @test_tile_dpbuud
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//CHECK-DAG: call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> {{%.*}})
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//CHECK-DAG: call x86_amx @llvm.x86.tdpbuud.internal
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//CHECK-DAG: call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx {{%.*}})
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__tile_dpbuud(&c, a, b);
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}
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void test_tile_stored(__tile1024i c) {
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//CHECK-LABEL: @test_tile_stored
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//CHECK-DAG: call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> {{%.*}})
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//CHECK-DAG: call void @llvm.x86.tilestored64.internal
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__tile_stored(buf, STRIDE, c);
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}
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void test_tile_zero(__tile1024i c) {
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//CHECK-LABEL: @test_tile_zero
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//CHECK-DAG: call x86_amx @llvm.x86.tilezero.internal
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//CHECK-DAG: call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx {{%.*}})
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__tile_zero(&c);
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}
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void test_tile_dpbf16ps(__tile1024i a, __tile1024i b, __tile1024i c) {
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//CHECK-LABEL: @test_tile_dpbf16ps
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//CHECK-DAG: call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> {{%.*}})
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//CHECK-DAG: call x86_amx @llvm.x86.tdpbf16ps.internal
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//CHECK-DAG: call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx {{%.*}})
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__tile_dpbf16ps(&a, b, c);
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}
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