A problem that I introduced in the decoder is that I was considering TSC decoding errors as actual instruction errors, which mean that the trace has a gap. This is wrong because a TSC decoding error doesn't mean that there's a gap in the trace. Instead, now I'm just counting how many of these errors happened and I'm using the `dump info` command to check for this number. Besides that, I refactored the decoder a little bit to make it simpler, more readable, and to handle TSCs in a cleaner way. Differential Revision: https://reviews.llvm.org/D122867
220 lines
6.6 KiB
C++
220 lines
6.6 KiB
C++
//===-- DecodedThread.cpp -------------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "DecodedThread.h"
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#include <intel-pt.h>
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#include <memory>
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#include "TraceCursorIntelPT.h"
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#include "lldb/Utility/StreamString.h"
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using namespace lldb;
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using namespace lldb_private;
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using namespace lldb_private::trace_intel_pt;
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using namespace llvm;
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char IntelPTError::ID;
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IntelPTError::IntelPTError(int libipt_error_code, lldb::addr_t address)
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: m_libipt_error_code(libipt_error_code), m_address(address) {
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assert(libipt_error_code < 0);
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}
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void IntelPTError::log(llvm::raw_ostream &OS) const {
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const char *libipt_error_message = pt_errstr(pt_errcode(m_libipt_error_code));
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if (m_address != LLDB_INVALID_ADDRESS && m_address > 0) {
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write_hex(OS, m_address, HexPrintStyle::PrefixLower, 18);
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OS << " ";
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}
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OS << "error: " << libipt_error_message;
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}
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IntelPTInstruction::IntelPTInstruction() {
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m_pt_insn.ip = LLDB_INVALID_ADDRESS;
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m_pt_insn.iclass = ptic_error;
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m_is_error = true;
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}
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bool IntelPTInstruction::IsError() const { return m_is_error; }
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lldb::addr_t IntelPTInstruction::GetLoadAddress() const { return m_pt_insn.ip; }
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size_t IntelPTInstruction::GetMemoryUsage() {
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return sizeof(IntelPTInstruction);
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}
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Optional<size_t> DecodedThread::GetRawTraceSize() const {
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return m_raw_trace_size;
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}
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TraceInstructionControlFlowType
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IntelPTInstruction::GetControlFlowType(lldb::addr_t next_load_address) const {
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if (IsError())
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return (TraceInstructionControlFlowType)0;
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TraceInstructionControlFlowType mask =
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eTraceInstructionControlFlowTypeInstruction;
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switch (m_pt_insn.iclass) {
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case ptic_cond_jump:
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case ptic_jump:
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case ptic_far_jump:
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mask |= eTraceInstructionControlFlowTypeBranch;
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if (m_pt_insn.ip + m_pt_insn.size != next_load_address)
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mask |= eTraceInstructionControlFlowTypeTakenBranch;
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break;
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case ptic_return:
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case ptic_far_return:
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mask |= eTraceInstructionControlFlowTypeReturn;
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break;
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case ptic_call:
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case ptic_far_call:
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mask |= eTraceInstructionControlFlowTypeCall;
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break;
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default:
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break;
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}
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return mask;
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}
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ThreadSP DecodedThread::GetThread() { return m_thread_sp; }
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void DecodedThread::RecordTscForLastInstruction(uint64_t tsc) {
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if (!m_last_tsc || *m_last_tsc != tsc) {
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// In case the first instructions are errors or did not have a TSC, we'll
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// get a first valid TSC not in position 0. We can safely force these error
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// instructions to use the first valid TSC, so that all the trace has TSCs.
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size_t start_index =
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m_instruction_timestamps.empty() ? 0 : m_instructions.size() - 1;
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m_instruction_timestamps.emplace(start_index, tsc);
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m_last_tsc = tsc;
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}
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}
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void DecodedThread::AppendInstruction(const pt_insn &insn) {
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m_instructions.emplace_back(insn);
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}
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void DecodedThread::AppendInstruction(const pt_insn &insn, uint64_t tsc) {
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AppendInstruction(insn);
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RecordTscForLastInstruction(tsc);
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}
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void DecodedThread::AppendError(llvm::Error &&error) {
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m_errors.try_emplace(m_instructions.size(), toString(std::move(error)));
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m_instructions.emplace_back();
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}
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void DecodedThread::AppendError(llvm::Error &&error, uint64_t tsc) {
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AppendError(std::move(error));
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RecordTscForLastInstruction(tsc);
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}
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void DecodedThread::LibiptErrors::RecordError(int libipt_error_code) {
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libipt_errors[pt_errstr(pt_errcode(libipt_error_code))]++;
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total_count++;
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}
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void DecodedThread::RecordTscError(int libipt_error_code) {
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m_tsc_errors.RecordError(libipt_error_code);
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}
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const DecodedThread::LibiptErrors &DecodedThread::GetTscErrors() const {
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return m_tsc_errors;
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}
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ArrayRef<IntelPTInstruction> DecodedThread::GetInstructions() const {
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return makeArrayRef(m_instructions);
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}
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Optional<DecodedThread::TscRange>
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DecodedThread::CalculateTscRange(size_t insn_index) const {
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auto it = m_instruction_timestamps.upper_bound(insn_index);
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if (it == m_instruction_timestamps.begin())
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return None;
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return TscRange(--it, *this);
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}
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bool DecodedThread::IsInstructionAnError(size_t insn_idx) const {
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return m_instructions[insn_idx].IsError();
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}
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const char *DecodedThread::GetErrorByInstructionIndex(size_t insn_idx) {
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auto it = m_errors.find(insn_idx);
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if (it == m_errors.end())
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return nullptr;
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return it->second.c_str();
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}
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DecodedThread::DecodedThread(ThreadSP thread_sp) : m_thread_sp(thread_sp) {}
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DecodedThread::DecodedThread(ThreadSP thread_sp, Error &&error)
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: m_thread_sp(thread_sp) {
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AppendError(std::move(error));
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}
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void DecodedThread::SetRawTraceSize(size_t size) { m_raw_trace_size = size; }
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lldb::TraceCursorUP DecodedThread::GetCursor() {
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// We insert a fake error signaling an empty trace if needed becasue the
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// TraceCursor requires non-empty traces.
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if (m_instructions.empty())
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AppendError(createStringError(inconvertibleErrorCode(), "empty trace"));
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return std::make_unique<TraceCursorIntelPT>(m_thread_sp, shared_from_this());
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}
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size_t DecodedThread::CalculateApproximateMemoryUsage() const {
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return IntelPTInstruction::GetMemoryUsage() * m_instructions.size() +
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m_errors.getMemorySize();
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}
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DecodedThread::TscRange::TscRange(std::map<size_t, uint64_t>::const_iterator it,
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const DecodedThread &decoded_thread)
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: m_it(it), m_decoded_thread(&decoded_thread) {
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auto next_it = m_it;
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++next_it;
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m_end_index = (next_it == m_decoded_thread->m_instruction_timestamps.end())
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? m_decoded_thread->GetInstructions().size() - 1
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: next_it->first - 1;
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}
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size_t DecodedThread::TscRange::GetTsc() const { return m_it->second; }
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size_t DecodedThread::TscRange::GetStartInstructionIndex() const {
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return m_it->first;
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}
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size_t DecodedThread::TscRange::GetEndInstructionIndex() const {
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return m_end_index;
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}
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bool DecodedThread::TscRange::InRange(size_t insn_index) {
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return GetStartInstructionIndex() <= insn_index &&
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insn_index <= GetEndInstructionIndex();
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}
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Optional<DecodedThread::TscRange> DecodedThread::TscRange::Next() {
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auto next_it = m_it;
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++next_it;
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if (next_it == m_decoded_thread->m_instruction_timestamps.end())
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return None;
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return TscRange(next_it, *m_decoded_thread);
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}
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Optional<DecodedThread::TscRange> DecodedThread::TscRange::Prev() {
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if (m_it == m_decoded_thread->m_instruction_timestamps.begin())
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return None;
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auto prev_it = m_it;
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--prev_it;
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return TscRange(prev_it, *m_decoded_thread);
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}
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