33388ae866
This patch introduces basic tablegen infra such as
LoongArch{InstrFormats,InstrInfo,RegisterInfo,CallingConv,}.td.
For now, only add instruction definitions for LoongArch basic integer
operations.
Our initial target is a working MC layer rather than codegen,
so appropriate SelectionDAG patterns will come later.
Differential revision: https://reviews.llvm.org/D115861
47 lines
1.4 KiB
C++
47 lines
1.4 KiB
C++
//=- LoongArchISelDAGToDAG.cpp - A dag to dag inst selector for LoongArch -===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines an instruction selector for the LoongArch target.
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//
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//===----------------------------------------------------------------------===//
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#include "LoongArchISelDAGToDAG.h"
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#include "MCTargetDesc/LoongArchMCTargetDesc.h"
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using namespace llvm;
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#define DEBUG_TYPE "loongarch-isel"
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void LoongArchDAGToDAGISel::Select(SDNode *Node) {
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// If we have a custom node, we have already selected.
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if (Node->isMachineOpcode()) {
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LLVM_DEBUG(dbgs() << "== "; Node->dump(CurDAG); dbgs() << "\n");
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Node->setNodeId(-1);
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return;
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}
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// Instruction Selection not handled by the auto-generated tablegen selection
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// should be handled here.
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unsigned Opcode = Node->getOpcode();
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SDLoc DL(Node);
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switch (Opcode) {
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default:
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break;
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// TODO: Add selection nodes needed later.
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}
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// Select the default instruction.
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SelectCode(Node);
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}
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// This pass converts a legalized DAG into a LoongArch-specific DAG, ready
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// for instruction scheduling.
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FunctionPass *llvm::createLoongArchISelDag(LoongArchTargetMachine &TM) {
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return new LoongArchDAGToDAGISel(TM);
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}
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