18f9351223
The compiler was generating symbols in the final code object for local branch target labels. This bloats the code object, slows down the loader, and is only used to simplify disassembly. Use '--symbolize-operands' with llvm-objdump to improve readability of the branch target operands in disassembly. Fixes: SWDEV-312223 Reviewed By: scott.linder Differential Revision: https://reviews.llvm.org/D114273
42 lines
1.5 KiB
LLVM
42 lines
1.5 KiB
LLVM
; RUN: llc -march=amdgcn -verify-machineinstrs -simplifycfg-require-and-preserve-domtree=1 < %s | FileCheck -check-prefix=GCN %s
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; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs -simplifycfg-require-and-preserve-domtree=1 < %s | FileCheck -check-prefix=GCN %s
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; This used to crash because during intermediate control flow lowering, there
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; was a sequence
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; s_mov_b64 s[0:1], exec
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; s_and_b64 s[2:3], s[0:1], s[2:3] ; def & use of the same register pair
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; ...
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; s_mov_b64_term exec, s[2:3]
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; that was not treated correctly.
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;
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; GCN-LABEL: {{^}}ham:
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; GCN-DAG: v_cmp_lt_f32_e64 [[OTHERCC:s\[[0-9]+:[0-9]+\]]],
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; GCN-DAG: v_cmp_lt_f32_e32 vcc,
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; GCN: s_and_b64 [[AND:s\[[0-9]+:[0-9]+\]]], vcc, [[OTHERCC]]
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; GCN: s_and_saveexec_b64 [[SAVED:s\[[0-9]+:[0-9]+\]]], [[AND]]
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; GCN-NEXT: s_cbranch_execz .LBB0_{{[0-9]+}}
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; GCN-NEXT: ; %bb.{{[0-9]+}}: ; %bb4
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; GCN: ds_write_b32
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; GCN: .LBB0_{{[0-9]+}}: ; %UnifiedReturnBlock
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; GCN-NEXT: s_endpgm
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; GCN-NEXT: .Lfunc_end
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define amdgpu_ps void @ham(float %arg, float %arg1) #0 {
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bb:
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%tmp = fcmp ogt float %arg, 0.000000e+00
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%tmp2 = fcmp ogt float %arg1, 0.000000e+00
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%tmp3 = and i1 %tmp, %tmp2
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br i1 %tmp3, label %bb4, label %bb5
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bb4: ; preds = %bb
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store volatile i32 4, i32 addrspace(3)* undef
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unreachable
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bb5: ; preds = %bb
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ret void
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}
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attributes #0 = { nounwind readonly "InitialPSInputAddr"="36983" }
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attributes #1 = { nounwind readnone }
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