fae05692a3
This will currently accept the old number of bytes syntax, and convert it to a scalar. This should be removed in the near future (I think I converted all of the tests already, but likely missed a few). Not sure what the exact syntax and policy should be. We can continue printing the number of bytes for non-generic instructions to avoid test churn and only allow non-scalar types for generic instructions. This will currently print the LLT in parentheses, but accept parsing the existing integers and implicitly converting to scalar. The parentheses are a bit ugly, but the parser logic seems unable to deal without either parentheses or some keyword to indicate the start of a type.
73 lines
4.2 KiB
YAML
73 lines
4.2 KiB
YAML
# RUN: llc -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs -run-pass greedy,amdgpu-nsa-reassign,virtregrewriter,si-shrink-instructions -o - %s | FileCheck -check-prefix=GCN %s
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--- |
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define amdgpu_kernel void @nsa_reassign() #0 { ret void }
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define amdgpu_kernel void @do_not_reassign_spill() #0 { ret void }
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attributes #0 = { "amdgpu-num-vgpr"="8" }
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...
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# GCN-LABEL: name: nsa_reassign
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# GCN: IMAGE_SAMPLE_C_L_V1_V5_gfx10
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---
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name: nsa_reassign
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tracksRegLiveness: true
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machineFunctionInfo:
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stackPtrOffsetReg: $sgpr32
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stack:
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- { id: 0, type: default, offset: 0, size: 4, alignment: 4 }
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registers:
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- { id: 0, class: vgpr_32, preferred-register: '$vgpr0' }
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- { id: 1, class: vgpr_32, preferred-register: '$vgpr1' }
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- { id: 2, class: vgpr_32, preferred-register: '$vgpr2' }
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- { id: 3, class: vgpr_32, preferred-register: '$vgpr3' }
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- { id: 4, class: vgpr_32, preferred-register: '$vgpr4' }
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- { id: 5, class: vgpr_32, preferred-register: '$vgpr5' }
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- { id: 6, class: vgpr_32, preferred-register: '$vgpr6' }
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- { id: 7, class: vgpr_32, preferred-register: '$vgpr7' }
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body: |
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bb.0:
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%0 = SI_SPILL_V32_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.0, align 4, addrspace 5)
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%1 = SI_SPILL_V32_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.0, align 4, addrspace 5)
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%2 = SI_SPILL_V32_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.0, align 4, addrspace 5)
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%3 = SI_SPILL_V32_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.0, align 4, addrspace 5)
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%4 = SI_SPILL_V32_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.0, align 4, addrspace 5)
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%5 = SI_SPILL_V32_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.0, align 4, addrspace 5)
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%6 = SI_SPILL_V32_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.0, align 4, addrspace 5)
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%7:vgpr_32 = IMAGE_SAMPLE_C_L_V1_V5_nsa_gfx10 %0, %2, %4, %5, %6, undef $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7, undef $sgpr8_sgpr9_sgpr10_sgpr11, 1, 2, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (s32) from custom "ImageResource")
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S_ENDPGM 0, implicit %7
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...
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# GCN-LABEL: do_not_reassign_spill
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# GCN: IMAGE_SAMPLE_C_L_V1_V5_nsa_gfx10
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---
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name: do_not_reassign_spill
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tracksRegLiveness: true
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machineFunctionInfo:
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stackPtrOffsetReg: $sgpr32
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stack:
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- { id: 0, type: default, offset: 0, size: 4, alignment: 4 }
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registers:
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- { id: 0, class: vgpr_32, preferred-register: '$vgpr0' }
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- { id: 1, class: vgpr_32, preferred-register: '$vgpr1' }
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- { id: 2, class: vgpr_32, preferred-register: '$vgpr2' }
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- { id: 3, class: vgpr_32, preferred-register: '$vgpr3' }
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- { id: 4, class: vgpr_32, preferred-register: '$vgpr4' }
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- { id: 5, class: vgpr_32, preferred-register: '$vgpr5' }
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- { id: 6, class: vgpr_32, preferred-register: '$vgpr6' }
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- { id: 7, class: vgpr_32, preferred-register: '$vgpr7' }
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body: |
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bb.0:
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%0 = SI_SPILL_V32_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.0, align 4, addrspace 5)
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%1 = SI_SPILL_V32_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.0, align 4, addrspace 5)
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%2 = SI_SPILL_V32_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.0, align 4, addrspace 5)
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%3 = SI_SPILL_V32_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.0, align 4, addrspace 5)
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%4 = SI_SPILL_V32_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.0, align 4, addrspace 5)
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%5 = SI_SPILL_V32_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.0, align 4, addrspace 5)
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%6 = SI_SPILL_V32_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.0, align 4, addrspace 5)
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S_NOP 0, implicit-def dead $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
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S_NOP 0, implicit %0, implicit %1, implicit %2, implicit %3, implicit %4, implicit %5, implicit %6
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%7:vgpr_32 = IMAGE_SAMPLE_C_L_V1_V5_nsa_gfx10 %0, %2, %4, %5, %6, undef $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7, undef $sgpr8_sgpr9_sgpr10_sgpr11, 1, 2, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (s32) from custom "ImageResource")
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S_ENDPGM 0, implicit %7
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...
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