d391e4fe84
Be more consistent in the naming convention for the various RET instructions to specify in terms of bitwidth. Helps prevent future scheduler model mismatches like those that were only addressed in D44687. Differential Revision: https://reviews.llvm.org/D113302
80 lines
2.7 KiB
YAML
80 lines
2.7 KiB
YAML
# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
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# This test ensures that the MIR parser parses the stack protector stack
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# object reference in the machine frame info correctly.
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--- |
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@.str = private unnamed_addr constant [4 x i8] c"%s\0A\00", align 1
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@__stack_chk_guard = external global i8*
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define i32 @test() #0 {
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entry:
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%StackGuardSlot = alloca i8*
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%StackGuard = load i8*, i8** @__stack_chk_guard
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call void @llvm.stackprotector(i8* %StackGuard, i8** %StackGuardSlot)
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%test = alloca i8*, align 8
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%a = alloca i8, i64 5
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store i8* %a, i8** %test, align 8
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%b = load i8*, i8** %test, align 8
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%call = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i32 0, i32 0), i8* %b)
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call void @llvm.stackprotectorcheck(i8** @__stack_chk_guard)
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ret i32 %call
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}
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declare i32 @printf(i8*, ...)
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declare void @llvm.stackprotector(i8*, i8**) #1
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declare void @llvm.stackprotectorcheck(i8**) #2
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attributes #0 = { ssp "stack-protector-buffer-size"="5" }
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attributes #1 = { nounwind }
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attributes #2 = { nounwind argmemonly }
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...
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---
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name: test
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alignment: 16
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tracksRegLiveness: true
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frameInfo:
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stackSize: 40
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maxAlignment: 8
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adjustsStack: true
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hasCalls: true
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# CHECK-LABEL: name: test
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# CHECK: frameInfo
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# CHECK: stackProtector: '%stack.0.StackGuardSlot'
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stackProtector: '%stack.0.StackGuardSlot'
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fixedStack:
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- { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 16,
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callee-saved-register: '$rbx' }
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stack:
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- { id: 0, name: StackGuardSlot, offset: -24, size: 8, alignment: 8 }
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- { id: 1, name: test, offset: -40, size: 8, alignment: 8 }
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- { id: 2, name: a, offset: -29, size: 5, alignment: 1 }
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body: |
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bb.0.entry:
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successors: %bb.1.entry, %bb.2.entry
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liveins: $rbx, $rbx
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frame-setup PUSH64r killed $rbx, implicit-def $rsp, implicit $rsp
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$rsp = frame-setup SUB64ri8 $rsp, 32, implicit-def dead $eflags
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$rbx = LOAD_STACK_GUARD :: (invariant load (s64) from @__stack_chk_guard)
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MOV64mr $rsp, 1, _, 24, _, $rbx
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$rsi = LEA64r $rsp, 1, _, 19, _
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MOV64mr $rsp, 1, _, 8, _, $rsi
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$rdi = LEA64r $rip, 1, _, @.str, _
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dead $eax = MOV32r0 implicit-def dead $eflags, implicit-def $al
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CALL64pcrel32 @printf, csr_64, implicit $rsp, implicit $rdi, implicit $rsi, implicit $al, implicit-def $rsp, implicit-def $eax
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CMP64rm killed $rbx, $rsp, 1, _, 24, _, implicit-def $eflags
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JCC_1 %bb.2.entry, 5, implicit $eflags
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bb.1.entry:
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liveins: $eax
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$rsp = ADD64ri8 $rsp, 32, implicit-def dead $eflags
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$rbx = POP64r implicit-def $rsp, implicit $rsp
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RET64 $eax
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bb.2.entry:
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CALL64pcrel32 &__stack_chk_fail, csr_64, implicit $rsp, implicit-def $rsp
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...
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