llvm-project/llvm/test/CodeGen/MIR/X86/instructions-debug-location.mir
Simon Pilgrim d391e4fe84 [X86] Update RET/LRET instruction to use the same naming convention as IRET (PR36876). NFC
Be more consistent in the naming convention for the various RET instructions to specify in terms of bitwidth.

Helps prevent future scheduler model mismatches like those that were only addressed in D44687.

Differential Revision: https://reviews.llvm.org/D113302
2021-11-07 15:06:54 +00:00

140 lines
5.7 KiB
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# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
# This test ensures that the MIR parser parses the machine instruction's
# debug location metadata correctly.
--- |
define i32 @test(i32 %x) #0 !dbg !4 {
entry:
%x.addr = alloca i32, align 4
store i32 %x, i32* %x.addr, align 4
call void @llvm.dbg.declare(metadata i32* %x.addr, metadata !12, metadata !DIExpression()), !dbg !13
%0 = load i32, i32* %x.addr, align 4, !dbg !14
ret i32 %0, !dbg !14
}
define i32 @test_typed_immediates(i32 %x) #0 {
entry:
%x.addr = alloca i32, align 4
store i32 %x, i32* %x.addr, align 4
call void @llvm.dbg.declare(metadata i32* %x.addr, metadata !12, metadata !DIExpression()), !dbg !13
%0 = load i32, i32* %x.addr, align 4, !dbg !14
ret i32 %0, !dbg !14
}
define i32 @test_mir_created(i32 %x) #0 !dbg !15 {
entry:
%x.addr = alloca i32, align 4
store i32 %x, i32* %x.addr, align 4
%0 = load i32, i32* %x.addr, align 4
%1 = load i32, i32* %x.addr, align 4
%2 = load i32, i32* %x.addr, align 4
%3 = load i32, i32* %x.addr, align 4
ret i32 %0, !dbg !16
}
declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
attributes #0 = { nounwind "frame-pointer"="none" }
attributes #1 = { nounwind readnone }
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!9, !10}
!llvm.ident = !{!11}
!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 3.7.0", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, retainedTypes: !2, globals: !2, imports: !2)
!1 = !DIFile(filename: "test.ll", directory: "")
!2 = !{}
!4 = distinct !DISubprogram(name: "test", scope: !5, file: !5, line: 4, type: !6, isLocal: false, isDefinition: true, scopeLine: 4, flags: DIFlagPrototyped, isOptimized: false, unit: !0, retainedNodes: !2)
!5 = !DIFile(filename: "test.c", directory: "")
!6 = !DISubroutineType(types: !7)
!7 = !{!8, !8}
!8 = !DIBasicType(name: "int", size: 32, align: 32, encoding: DW_ATE_signed)
!9 = !{i32 2, !"Dwarf Version", i32 4}
!10 = !{i32 2, !"Debug Info Version", i32 3}
!11 = !{!"clang version 3.7.0"}
!12 = !DILocalVariable(name: "x", arg: 1, scope: !4, file: !5, line: 4, type: !8)
!13 = !DILocation(line: 4, scope: !4)
!14 = !DILocation(line: 8, scope: !4)
!15 = distinct !DISubprogram(name: "test_mir_created", scope: !5, file: !5, line: 10, type: !6, isLocal: false, isDefinition: true, scopeLine: 10, flags: DIFlagPrototyped, isOptimized: false, unit: !0, retainedNodes: !2)
!16 = !DILocation(line: 20, scope: !15)
...
---
name: test
tracksRegLiveness: true
registers:
- { id: 0, class: gr32 }
frameInfo:
maxAlignment: 4
stack:
- { id: 0, name: x.addr, size: 4, alignment: 4 }
body: |
bb.0.entry:
liveins: $edi
; CHECK: DBG_VALUE $noreg, 0, !11, !DIExpression(), debug-location !12
; CHECK: DBG_VALUE $noreg, 0, !11, !DIExpression(), debug-location !12
; CHECK: $eax = COPY %0, debug-location !13
; CHECK: RET64 $eax, debug-location !13
%0 = COPY $edi
DBG_VALUE _, 0, !12, !DIExpression(), debug-location !13
; Test whether debug-use is still recognized for compatibility with old
; files.
DBG_VALUE debug-use _, 0, !12, !DIExpression(), debug-location !13
MOV32mr %stack.0.x.addr, 1, _, 0, _, %0
$eax = COPY %0, debug-location !14
RET64 $eax, debug-location !14
...
---
name: test_typed_immediates
tracksRegLiveness: true
registers:
- { id: 0, class: gr32 }
frameInfo:
maxAlignment: 4
stack:
- { id: 0, name: x.addr, size: 4, alignment: 4 }
body: |
bb.0.entry:
liveins: $edi
%0 = COPY $edi
; CHECK: DBG_VALUE $noreg, i32 0, !11, !DIExpression()
; CHECK-NEXT: DBG_VALUE $noreg, i64 -22, !11, !DIExpression()
; CHECK-NEXT: DBG_VALUE $noreg, i128 123492148938512984928424384934328985928, !11, !DIExpression()
DBG_VALUE _, i32 0, !12, !DIExpression(), debug-location !13
DBG_VALUE _, i64 -22, !12, !DIExpression(), debug-location !13
DBG_VALUE _, i128 123492148938512984928424384934328985928, !12, !DIExpression(), debug-location !13
MOV32mr %stack.0.x.addr, 1, _, 0, _, %0
$eax = COPY %0
RET64 $eax
...
---
name: test_mir_created
tracksRegLiveness: true
registers:
- { id: 0, class: gr32 }
frameInfo:
maxAlignment: 4
stack:
- { id: 0, name: x.addr, size: 4, alignment: 4 }
body: |
bb.0.entry:
liveins: $edi
%0 = COPY $edi
; CHECK-LABEL: name: test_mir_created
; CHECK: MOV32mr %stack.0.x.addr, 1, $noreg, 0, $noreg, %0, debug-location !DILocation(line: 1, scope: !14)
; CHECK: MOV32mr %stack.0.x.addr, 1, $noreg, 0, $noreg, %0, debug-location !DILocation(line: 2, column: 2, scope: !14)
; CHECK: MOV32mr %stack.0.x.addr, 1, $noreg, 0, $noreg, %0, debug-location !DILocation(line: 3, column: 2, scope: !14, isImplicitCode: true)
; CHECK: MOV32mr %stack.0.x.addr, 1, $noreg, 0, $noreg, %0, debug-location !DILocation(line: 4, scope: !14, inlinedAt: !15)
; CHECK: MOV32mr %stack.0.x.addr, 1, $noreg, 0, $noreg, %0, debug-location !DILocation(line: 5, scope: !14, inlinedAt: !DILocation(line: 4, scope: !14))
MOV32mr %stack.0.x.addr, 1, _, 0, _, %0, debug-location !DILocation(line: 1, scope: !15)
MOV32mr %stack.0.x.addr, 1, _, 0, _, %0, debug-location !DILocation(line: 2, column: 2, scope: !15)
MOV32mr %stack.0.x.addr, 1, _, 0, _, %0, debug-location !DILocation(line: 3, column: 2, scope: !15, isImplicitCode: true)
MOV32mr %stack.0.x.addr, 1, _, 0, _, %0, debug-location !DILocation(line: 4, scope: !15, inlinedAt: !16)
MOV32mr %stack.0.x.addr, 1, _, 0, _, %0, debug-location !DILocation(line: 5, scope: !15, inlinedAt: !DILocation(line: 4, scope: !15))
$eax = COPY %0
RET64 $eax
...