300e1293de
We are going to remove the old 'perfect shuffle' optimization since it brings performance penalty in hot loop around vectors. For example, in following loop sharing the same mask: %v.1 = shufflevector ... <0,1,2,3,8,9,10,11,16,17,18,19,24,25,26,27> %v.2 = shufflevector ... <0,1,2,3,8,9,10,11,16,17,18,19,24,25,26,27> The generated instructions will be `vmrglw-vmrghw-vmrglw-vmrghw` instead of `vperm-vperm`. In some large loop cases, this causes 20%+ performance penalty. The original attempt to resolve this is to pre-record masks of every shufflevector operation in DAG, but that is somewhat complex and brings unnecessary computation (to scan all nodes) in optimization. Here we disable it by default. There're indeed some cases becoming worse after this, which will be fixed in a more careful way in future patches. Reviewed By: jsji Differential Revision: https://reviews.llvm.org/D121082
105 lines
3.8 KiB
LLVM
105 lines
3.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -mcpu=pwr7 \
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; RUN: -verify-machineinstrs -O2 -mattr=vsx < %s | \
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; RUN: FileCheck %s --check-prefix=CHECK-AIX
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; RUN: llc -mtriple powerpc64le-unknown-linux-gnu -mcpu=pwr8 \
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; RUN: -verify-machineinstrs -O2 -mattr=vsx < %s | \
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; RUN: FileCheck %s
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define void @test_aix_splatimm(i32 %arg, i32 %arg1, i32 %arg2) {
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; CHECK-AIX-LABEL: test_aix_splatimm:
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; CHECK-AIX: # %bb.0: # %bb
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; CHECK-AIX-NEXT: bclr 12, 20, 0
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; CHECK-AIX-NEXT: # %bb.1: # %bb3
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; CHECK-AIX-NEXT: srwi 4, 4, 16
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; CHECK-AIX-NEXT: srwi 5, 5, 16
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; CHECK-AIX-NEXT: mullw 4, 5, 4
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; CHECK-AIX-NEXT: lwz 5, 0(3)
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; CHECK-AIX-NEXT: slwi 3, 3, 8
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; CHECK-AIX-NEXT: neg 3, 3
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; CHECK-AIX-NEXT: srwi 5, 5, 1
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; CHECK-AIX-NEXT: sth 3, -32(1)
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; CHECK-AIX-NEXT: addi 3, 1, -32
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; CHECK-AIX-NEXT: mullw 4, 4, 5
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; CHECK-AIX-NEXT: li 5, 0
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; CHECK-AIX-NEXT: sth 5, -48(1)
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; CHECK-AIX-NEXT: neg 4, 4
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; CHECK-AIX-NEXT: sth 4, -16(1)
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; CHECK-AIX-NEXT: addi 4, 1, -48
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; CHECK-AIX-NEXT: lxvw4x 34, 0, 4
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; CHECK-AIX-NEXT: lxvw4x 35, 0, 3
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; CHECK-AIX-NEXT: addi 3, 1, -16
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; CHECK-AIX-NEXT: lxvw4x 36, 0, 3
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; CHECK-AIX-NEXT: ld 3, L..C0(2) # %const.0
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; CHECK-AIX-NEXT: vmrghh 3, 2, 3
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; CHECK-AIX-NEXT: vmrghh 4, 4, 2
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; CHECK-AIX-NEXT: vsplth 2, 2, 0
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; CHECK-AIX-NEXT: xxmrghw 34, 35, 34
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; CHECK-AIX-NEXT: lxvw4x 35, 0, 3
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; CHECK-AIX-NEXT: vperm 2, 2, 4, 3
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; CHECK-AIX-NEXT: vsplth 3, 2, 1
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; CHECK-AIX-NEXT: vsplth 2, 2, 4
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; CHECK-AIX-NEXT: stxvw4x 35, 0, 5
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; CHECK-AIX-NEXT: stxvw4x 34, 0, 3
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;
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; CHECK-LABEL: test_aix_splatimm:
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; CHECK: # %bb.0: # %bb
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; CHECK-NEXT: bclr 12, 20, 0
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; CHECK-NEXT: # %bb.1: # %bb3
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; CHECK-NEXT: srwi 4, 4, 16
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; CHECK-NEXT: srwi 5, 5, 16
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; CHECK-NEXT: mullw 4, 5, 4
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; CHECK-NEXT: lwz 5, 0(3)
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; CHECK-NEXT: slwi 3, 3, 8
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; CHECK-NEXT: neg 3, 3
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; CHECK-NEXT: srwi 5, 5, 1
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; CHECK-NEXT: mtvsrd 35, 3
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; CHECK-NEXT: mullw 4, 4, 5
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; CHECK-NEXT: li 5, 0
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; CHECK-NEXT: mtvsrd 34, 5
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; CHECK-NEXT: vmrghh 3, 3, 2
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; CHECK-NEXT: neg 3, 4
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; CHECK-NEXT: mtvsrd 36, 3
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; CHECK-NEXT: addis 3, 2, .LCPI0_0@toc@ha
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; CHECK-NEXT: addi 3, 3, .LCPI0_0@toc@l
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; CHECK-NEXT: vmrghh 4, 2, 4
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; CHECK-NEXT: vsplth 2, 2, 3
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; CHECK-NEXT: xxmrglw 34, 34, 35
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; CHECK-NEXT: lvx 3, 0, 3
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; CHECK-NEXT: li 3, 0
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; CHECK-NEXT: vperm 2, 4, 2, 3
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; CHECK-NEXT: vsplth 3, 2, 6
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; CHECK-NEXT: vsplth 2, 2, 3
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; CHECK-NEXT: stvx 3, 0, 3
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; CHECK-NEXT: stvx 2, 0, 3
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bb:
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br i1 undef, label %bb22, label %bb3
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bb3: ; preds = %bb
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%i = insertelement <8 x i16> undef, i16 0, i32 0
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%i4 = trunc i32 %arg to i16
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%i5 = mul i16 %i4, -256
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%i6 = insertelement <8 x i16> %i, i16 %i5, i32 1
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%i7 = ashr i32 %arg1, 16
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%i8 = ashr i32 %arg2, 16
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%i9 = mul nsw i32 %i8, %i7
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%i10 = insertelement <8 x i16> %i6, i16 0, i32 2
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%i11 = insertelement <8 x i16> %i10, i16 0, i32 3
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%i12 = load i32, i32* undef, align 4
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%i13 = ashr i32 %i12, 1
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%i14 = mul i32 %i9, %i13
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%i15 = trunc i32 %i14 to i16
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%i16 = sub i16 0, %i15
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%i17 = insertelement <8 x i16> %i11, i16 %i16, i32 4
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%i18 = insertelement <8 x i16> %i17, i16 0, i32 5
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%i19 = bitcast <8 x i16> %i18 to <16 x i8>
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%i20 = shufflevector <16 x i8> %i19, <16 x i8> undef, <16 x i32> <i32 2, i32 3, i32 2, i32 3, i32 2, i32 3, i32 2, i32 3, i32 2, i32 3, i32 2, i32 3, i32 2, i32 3, i32 2, i32 3>
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store <16 x i8> %i20, <16 x i8>* null, align 16
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%i21 = shufflevector <16 x i8> %i19, <16 x i8> undef, <16 x i32> <i32 8, i32 9, i32 8, i32 9, i32 8, i32 9, i32 8, i32 9, i32 8, i32 9, i32 8, i32 9, i32 8, i32 9, i32 8, i32 9>
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store <16 x i8> %i21, <16 x i8>* undef, align 16
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unreachable
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bb22: ; preds = %bb
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ret void
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}
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