73a7d451a2
LLVM test CodeGen/PowerPC/ppc-disable-non-volatile-cr.ll tries to check for the absence of a sequence of instructions with several CHECK-NOT with one of those directives using a variable defined in another. However CHECK-NOT are checked independently so that is using a variable defined in a pattern that should not occur in the input. This commit changes occurence of the variable for the regex used in its definition, thereby making each CHECK-NOT independent. Reviewed By: NeHuang, nemanjai Differential Revision: https://reviews.llvm.org/D99880
48 lines
1.8 KiB
LLVM
48 lines
1.8 KiB
LLVM
; Note: Test option to disable use of non-volatile CR to avoid CR spilling in prologue.
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -ppc-disable-non-volatile-cr\
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; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | FileCheck --check-prefix=CHECK-DISABLE %s
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu\
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; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | FileCheck --check-prefix=CHECK-ENABLE %s
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; Function Attrs: nounwind
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define dso_local signext i32 @DisableNonVolatileCR(i32 signext %a, i32 signext %b) {
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; CHECK-DISABLE-LABEL: DisableNonVolatileCR:
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; CHECK-DISABLE: # %bb.0: # %entry
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; CHECK-DISABLE-NOT: mfocrf {{r[0-9]+}}
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; CHECK-DISABLE-NOT: stw {{r[0-9]+}}
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; CHECK-DISABLE: stdu r1
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; CHECK-DISABLE-DAG: mfocrf [[REG2:r[0-9]+]]
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; CHECK-DISABLE-DAG: stw [[REG2]]
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; CHECK-DISABLE: # %bb.1: # %if.then
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;
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; CHECK-ENABLE-LABEL: DisableNonVolatileCR:
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; CHECK-ENABLE: # %bb.0: # %entry
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; CHECK-ENABLE-DAG: mfocrf [[REG1:r[0-9]+]]
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; CHECK-ENABLE-DAG: stw [[REG1]]
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; CHECK-ENABLE: stdu r1
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; CHECK-ENABLE-NOT: mfocrf {{r[0-9]+}}
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; CHECK-ENABLE-NOT: stw {{r[0-9]+}}
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; CHECK-ENABLE: # %bb.1: # %if.then
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entry:
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%cmp = icmp slt i32 %a, %b
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br i1 %cmp, label %if.then, label %if.else
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if.then: ; preds = %entry
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tail call void bitcast (void (...)* @fa to void ()*)()
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br label %if.end
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if.else: ; preds = %entry
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tail call void bitcast (void (...)* @fb to void ()*)()
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br label %if.end
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if.end: ; preds = %if.else, %if.then
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%conv = zext i1 %cmp to i32
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%call = tail call signext i32 @callee(i32 signext %conv)
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ret i32 %call
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}
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declare void @fa(...)
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declare void @fb(...)
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declare signext i32 @callee(i32 signext)
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