adc26b4eae
It fixes the overflow of 8-bit immediate field in the emitted instruction that allocates large stacklet. For thumb2 targets, load large immediate by a pair of movw and movt instruction. For thumb1 and ARM targets, load large immediate by reading from literal pool. Differential Revision: https://reviews.llvm.org/D118545
175 lines
4.8 KiB
LLVM
175 lines
4.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=thumb-linux-androideabi -mcpu=arm1156t2-s -mattr=+thumb2 -verify-machineinstrs | FileCheck %s -check-prefix=THUMB
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; RUN: llc < %s -mtriple=arm-linux-androideabi -mcpu=arm1156t2-s -verify-machineinstrs | FileCheck %s -check-prefix=ARM
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; Just to prevent the alloca from being optimized away
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declare void @dummy_use(i32*, i32)
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define void @test_basic() #0 {
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; THUMB-LABEL: test_basic:
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; THUMB: @ %bb.0:
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; THUMB-NEXT: push {r4, r5}
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; THUMB-NEXT: mrc p15, #0, r4, c13, c0, #3
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; THUMB-NEXT: mov r5, sp
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; THUMB-NEXT: ldr.w r4, [r4, #252]
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; THUMB-NEXT: cmp r4, r5
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; THUMB-NEXT: blo .LBB0_2
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; THUMB-NEXT: @ %bb.1:
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; THUMB-NEXT: mov r4, #48
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; THUMB-NEXT: mov r5, #0
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; THUMB-NEXT: push {lr}
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; THUMB-NEXT: bl __morestack
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; THUMB-NEXT: ldr lr, [sp], #4
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; THUMB-NEXT: pop {r4, r5}
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; THUMB-NEXT: bx lr
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; THUMB-NEXT: .LBB0_2:
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; THUMB-NEXT: pop {r4, r5}
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; THUMB-NEXT: .save {r7, lr}
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; THUMB-NEXT: push {r7, lr}
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; THUMB-NEXT: .pad #40
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; THUMB-NEXT: sub sp, #40
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; THUMB-NEXT: mov r0, sp
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; THUMB-NEXT: movs r1, #10
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; THUMB-NEXT: bl dummy_use
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; THUMB-NEXT: add sp, #40
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; THUMB-NEXT: pop {r7, pc}
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;
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; ARM-LABEL: test_basic:
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; ARM: @ %bb.0:
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; ARM-NEXT: push {r4, r5}
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; ARM-NEXT: mrc p15, #0, r4, c13, c0, #3
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; ARM-NEXT: mov r5, sp
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; ARM-NEXT: ldr r4, [r4, #252]
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; ARM-NEXT: cmp r4, r5
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; ARM-NEXT: blo .LBB0_2
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; ARM-NEXT: @ %bb.1:
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; ARM-NEXT: mov r4, #48
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; ARM-NEXT: mov r5, #0
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; ARM-NEXT: stmdb sp!, {lr}
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; ARM-NEXT: bl __morestack
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; ARM-NEXT: ldm sp!, {lr}
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; ARM-NEXT: pop {r4, r5}
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; ARM-NEXT: bx lr
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; ARM-NEXT: .LBB0_2:
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; ARM-NEXT: pop {r4, r5}
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; ARM-NEXT: .save {r11, lr}
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; ARM-NEXT: push {r11, lr}
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; ARM-NEXT: .pad #40
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; ARM-NEXT: sub sp, sp, #40
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; ARM-NEXT: mov r0, sp
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; ARM-NEXT: mov r1, #10
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; ARM-NEXT: bl dummy_use
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; ARM-NEXT: add sp, sp, #40
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; ARM-NEXT: pop {r11, pc}
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%mem = alloca i32, i32 10
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call void @dummy_use (i32* %mem, i32 10)
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ret void
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}
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define void @test_large() #0 {
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%mem = alloca i32, i32 10000
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call void @dummy_use (i32* %mem, i32 0)
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ret void
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; THUMB-LABEL: test_large:
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; THUMB: push {r4, r5}
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; THUMB-NEXT: movw r4, #40192
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; THUMB-NEXT: mov r5, sp
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; THUMB-NEXT: movt r4, #0
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; THUMB-NEXT: sub r5, r5, r4
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; THUMB-NEXT: mrc p15, #0, r4, c13, c0, #3
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; THUMB-NEXT: ldr.w r4, [r4, #252]
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; THUMB-NEXT: cmp r4, r5
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; THUMB-NEXT: blo .LBB1_2
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; THUMB: movw r4, #40192
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; THUMB-NEXT: movt r4, #0
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; THUMB-NEXT: mov r5, #0
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; THUMB-NEXT: push {lr}
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; THUMB-NEXT: bl __morestack
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; THUMB-NEXT: ldr lr, [sp], #4
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; THUMB-NEXT: pop {r4, r5}
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; THUMB-NEXT: bx lr
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; THUMB: pop {r4, r5}
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; ARM-LABEL: test_large:
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; ARM: push {r4, r5}
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; ARM-NEXT: ldr r4, .LCPI1_0
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; ARM-NEXT: sub r5, sp, r4
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; ARM-NEXT: mrc p15, #0, r4, c13, c0, #3
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; ARM-NEXT: ldr r4, [r4, #252]
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; ARM-NEXT: cmp r4, r5
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; ARM-NEXT: blo .LBB1_2
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; ARM: ldr r4, .LCPI1_0
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; ARM-NEXT: mov r5, #0
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; ARM-NEXT: stmdb sp!, {lr}
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; ARM-NEXT: bl __morestack
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; ARM-NEXT: ldm sp!, {lr}
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; ARM-NEXT: pop {r4, r5}
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; ARM-NEXT: bx lr
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; ARM: pop {r4, r5}
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; ARM: .LCPI1_0:
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; ARM-NEXT: .long 40192
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}
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define fastcc void @test_fastcc_large() #0 {
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%mem = alloca i32, i32 10000
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call void @dummy_use (i32* %mem, i32 0)
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ret void
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; THUMB-LABEL: test_fastcc_large:
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; THUMB: push {r4, r5}
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; THUMB-NEXT: movw r4, #40192
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; THUMB-NEXT: mov r5, sp
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; THUMB-NEXT: movt r4, #0
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; THUMB-NEXT: sub r5, r5, r4
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; THUMB-NEXT: mrc p15, #0, r4, c13, c0, #3
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; THUMB-NEXT: ldr.w r4, [r4, #252]
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; THUMB-NEXT: cmp r4, r5
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; THUMB-NEXT: blo .LBB2_2
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; THUMB: movw r4, #40192
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; THUMB-NEXT: movt r4, #0
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; THUMB-NEXT: mov r5, #0
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; THUMB-NEXT: push {lr}
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; THUMB-NEXT: bl __morestack
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; THUMB-NEXT: ldr lr, [sp], #4
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; THUMB-NEXT: pop {r4, r5}
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; THUMB-NEXT: bx lr
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; THUMB: pop {r4, r5}
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; ARM-LABEL: test_fastcc_large:
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; ARM: push {r4, r5}
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; ARM-NEXT: ldr r4, .LCPI2_0
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; ARM-NEXT: sub r5, sp, r4
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; ARM-NEXT: mrc p15, #0, r4, c13, c0, #3
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; ARM-NEXT: ldr r4, [r4, #252]
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; ARM-NEXT: cmp r4, r5
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; ARM-NEXT: blo .LBB2_2
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; ARM: ldr r4, .LCPI2_0
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; ARM-NEXT: mov r5, #0
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; ARM-NEXT: stmdb sp!, {lr}
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; ARM-NEXT: bl __morestack
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; ARM-NEXT: ldm sp!, {lr}
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; ARM-NEXT: pop {r4, r5}
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; ARM-NEXT: bx lr
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; ARM: .LCPI2_0:
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; ARM-NEXT: .long 40192
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}
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attributes #0 = { "split-stack" }
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