892c731681
Instead of summing leading zeros on the input operands, multiply the max possible values of those inputs and count the leading zeros of the result. This can give us an extra zero bit (typically in cases where one of the operands is a known constant). This allows folding away the remaining 'add' ops in the motivating bug (modeled in the PhaseOrdering IR test): https://github.com/llvm/llvm-project/issues/48399 Fixes #48399 Differential Revision: https://reviews.llvm.org/D115969
135 lines
4.1 KiB
LLVM
135 lines
4.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
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; RUN: llc < %s -mtriple=i386-unknown | FileCheck %s --check-prefix=X86
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define i128 @foo(i128 %t, i128 %u) {
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; X64-LABEL: foo:
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; X64: # %bb.0:
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; X64-NEXT: movq %rdx, %r8
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; X64-NEXT: movq %rdi, %rax
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; X64-NEXT: imulq %rdi, %rcx
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; X64-NEXT: mulq %rdx
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; X64-NEXT: addq %rcx, %rdx
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; X64-NEXT: imulq %rsi, %r8
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; X64-NEXT: addq %r8, %rdx
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; X64-NEXT: retq
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;
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; X86-LABEL: foo:
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; X86: # %bb.0:
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; X86-NEXT: pushl %ebp
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; X86-NEXT: .cfi_def_cfa_offset 8
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; X86-NEXT: pushl %ebx
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; X86-NEXT: .cfi_def_cfa_offset 12
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; X86-NEXT: pushl %edi
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; X86-NEXT: .cfi_def_cfa_offset 16
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; X86-NEXT: pushl %esi
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; X86-NEXT: .cfi_def_cfa_offset 20
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; X86-NEXT: subl $8, %esp
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; X86-NEXT: .cfi_def_cfa_offset 28
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; X86-NEXT: .cfi_offset %esi, -20
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; X86-NEXT: .cfi_offset %edi, -16
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; X86-NEXT: .cfi_offset %ebx, -12
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; X86-NEXT: .cfi_offset %ebp, -8
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
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; X86-NEXT: imull %ecx, %ebp
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; X86-NEXT: movl %esi, %eax
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; X86-NEXT: mull %ecx
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; X86-NEXT: movl %eax, %ebx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
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; X86-NEXT: imull %esi, %edi
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; X86-NEXT: addl %edx, %edi
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: addl %ebp, %edi
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; X86-NEXT: movl %eax, %ecx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
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; X86-NEXT: imull %ebp, %ecx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
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; X86-NEXT: mull %esi
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; X86-NEXT: addl %ecx, %edx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: imull %esi, %ecx
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; X86-NEXT: addl %edx, %ecx
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; X86-NEXT: addl %ebx, %eax
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; X86-NEXT: movl %eax, (%esp) # 4-byte Spill
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; X86-NEXT: adcl %edi, %ecx
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; X86-NEXT: movl %esi, %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
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; X86-NEXT: mull %esi
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; X86-NEXT: movl %edx, %edi
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; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
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; X86-NEXT: movl %ebp, %eax
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; X86-NEXT: mull %esi
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; X86-NEXT: movl %edx, %ebx
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; X86-NEXT: movl %eax, %esi
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; X86-NEXT: addl %edi, %esi
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; X86-NEXT: adcl $0, %ebx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: mull {{[0-9]+}}(%esp)
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; X86-NEXT: movl %edx, %edi
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; X86-NEXT: movl %eax, %ebp
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; X86-NEXT: addl %esi, %ebp
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; X86-NEXT: adcl %ebx, %edi
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; X86-NEXT: setb %bl
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: mull {{[0-9]+}}(%esp)
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; X86-NEXT: addl %edi, %eax
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; X86-NEXT: movzbl %bl, %esi
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; X86-NEXT: adcl %esi, %edx
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; X86-NEXT: addl (%esp), %eax # 4-byte Folded Reload
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; X86-NEXT: adcl %ecx, %edx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl %ebp, 4(%ecx)
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; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
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; X86-NEXT: movl %esi, (%ecx)
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; X86-NEXT: movl %eax, 8(%ecx)
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; X86-NEXT: movl %edx, 12(%ecx)
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; X86-NEXT: movl %ecx, %eax
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; X86-NEXT: addl $8, %esp
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; X86-NEXT: .cfi_def_cfa_offset 20
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; X86-NEXT: popl %esi
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; X86-NEXT: .cfi_def_cfa_offset 16
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; X86-NEXT: popl %edi
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; X86-NEXT: .cfi_def_cfa_offset 12
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; X86-NEXT: popl %ebx
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; X86-NEXT: .cfi_def_cfa_offset 8
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; X86-NEXT: popl %ebp
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; X86-NEXT: .cfi_def_cfa_offset 4
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; X86-NEXT: retl $4
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%k = mul i128 %t, %u
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ret i128 %k
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}
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@aaa = external dso_local global i128
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@bbb = external dso_local global i128
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define void @PR13897() nounwind {
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; X64-LABEL: PR13897:
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; X64: # %bb.0: # %"0x0"
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; X64-NEXT: movl bbb(%rip), %eax
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; X64-NEXT: movq %rax, %rcx
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; X64-NEXT: shlq $32, %rcx
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; X64-NEXT: orq %rax, %rcx
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; X64-NEXT: movq %rcx, aaa+8(%rip)
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; X64-NEXT: movq %rcx, aaa(%rip)
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; X64-NEXT: retq
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;
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; X86-LABEL: PR13897:
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; X86: # %bb.0: # %"0x0"
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; X86-NEXT: movl bbb, %eax
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; X86-NEXT: movl %eax, aaa+12
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; X86-NEXT: movl %eax, aaa+8
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; X86-NEXT: movl %eax, aaa+4
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; X86-NEXT: movl %eax, aaa
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; X86-NEXT: retl
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"0x0":
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%0 = load i128, i128* @bbb
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%1 = and i128 %0, 4294967295
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%2 = shl i128 %0, 96
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%3 = mul i128 %1, 18446744078004518913
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%4 = add i128 %3, %2
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store i128 %4, i128* @aaa
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ret void
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}
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