147cfcbef1
This completes the removal of uses of SelectionDAG::getSplatValue started in D119090 - by avoiding extracting the splatted element we make it a lot easier to zero-extend the bottom 64-bits of the shift amount and fixes issues we had on 32-bit targets where i64 isn't legal. I've removed the old version of getTargetVShiftNode that took the scalar shift amount argument and LowerRotate can finally efficiently handle vXi16 rotates-by-scalar (using the same code as general funnel-shifts). The only regression we see is in the X86-AVX2 PR52719 test case in vector-shift-ashr-256.ll - this is now hitting the same problem as the X86-AVX1 case (failure to simplify a multi-use X86ISD::VBROADCAST_LOAD) which I intend to address in a follow up patch.
114 lines
4.6 KiB
LLVM
114 lines
4.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-pc-linux -mcpu=corei7-avx | FileCheck %s --check-prefixes=X86
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; RUN: llc < %s -mtriple=x86_64-pc-linux -mcpu=corei7-avx | FileCheck %s --check-prefixes=X64
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define <8 x i32> @shiftInput___vyuunu(<8 x i32> %input, i32 %shiftval, <8 x i32> %__mask) nounwind {
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; X86-LABEL: shiftInput___vyuunu:
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; X86: # %bb.0: # %allocas
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; X86-NEXT: vextractf128 $1, %ymm0, %xmm1
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; X86-NEXT: vmovd {{.*#+}} xmm2 = mem[0],zero,zero,zero
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; X86-NEXT: vpsrld %xmm2, %xmm1, %xmm1
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; X86-NEXT: vpsrld %xmm2, %xmm0, %xmm0
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; X86-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
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; X86-NEXT: retl
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;
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; X64-LABEL: shiftInput___vyuunu:
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; X64: # %bb.0: # %allocas
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; X64-NEXT: vmovd %edi, %xmm1
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; X64-NEXT: vextractf128 $1, %ymm0, %xmm2
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; X64-NEXT: vpsrld %xmm1, %xmm2, %xmm2
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; X64-NEXT: vpsrld %xmm1, %xmm0, %xmm0
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; X64-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
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; X64-NEXT: retq
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allocas:
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%smear.0 = insertelement <8 x i32> undef, i32 %shiftval, i32 0
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%smear.1 = insertelement <8 x i32> %smear.0, i32 %shiftval, i32 1
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%smear.2 = insertelement <8 x i32> %smear.1, i32 %shiftval, i32 2
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%smear.3 = insertelement <8 x i32> %smear.2, i32 %shiftval, i32 3
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%smear.4 = insertelement <8 x i32> %smear.3, i32 %shiftval, i32 4
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%smear.5 = insertelement <8 x i32> %smear.4, i32 %shiftval, i32 5
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%smear.6 = insertelement <8 x i32> %smear.5, i32 %shiftval, i32 6
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%smear.7 = insertelement <8 x i32> %smear.6, i32 %shiftval, i32 7
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%bitop = lshr <8 x i32> %input, %smear.7
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ret <8 x i32> %bitop
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}
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define <8 x i32> @shiftInput___canonical(<8 x i32> %input, i32 %shiftval, <8 x i32> %__mask) nounwind {
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; X86-LABEL: shiftInput___canonical:
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; X86: # %bb.0: # %allocas
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; X86-NEXT: vbroadcastss {{[0-9]+}}(%esp), %xmm1
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; X86-NEXT: vpmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero
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; X86-NEXT: vextractf128 $1, %ymm0, %xmm2
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; X86-NEXT: vpsrld %xmm1, %xmm2, %xmm2
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; X86-NEXT: vpsrld %xmm1, %xmm0, %xmm0
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; X86-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
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; X86-NEXT: retl
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;
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; X64-LABEL: shiftInput___canonical:
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; X64: # %bb.0: # %allocas
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; X64-NEXT: vmovd %edi, %xmm1
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; X64-NEXT: vextractf128 $1, %ymm0, %xmm2
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; X64-NEXT: vpsrld %xmm1, %xmm2, %xmm2
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; X64-NEXT: vpsrld %xmm1, %xmm0, %xmm0
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; X64-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
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; X64-NEXT: retq
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allocas:
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%smear.0 = insertelement <8 x i32> undef, i32 %shiftval, i32 0
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%smear.7 = shufflevector <8 x i32> %smear.0, <8 x i32> undef, <8 x i32> zeroinitializer
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%bitop = lshr <8 x i32> %input, %smear.7
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ret <8 x i32> %bitop
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}
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define <4 x i64> @shiftInput___64in32bitmode(<4 x i64> %input, i64 %shiftval) nounwind {
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; X86-LABEL: shiftInput___64in32bitmode:
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; X86: # %bb.0: # %allocas
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; X86-NEXT: vextractf128 $1, %ymm0, %xmm1
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; X86-NEXT: vmovq {{.*#+}} xmm2 = mem[0],zero
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; X86-NEXT: vpsrlq %xmm2, %xmm1, %xmm1
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; X86-NEXT: vpsrlq %xmm2, %xmm0, %xmm0
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; X86-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
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; X86-NEXT: retl
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;
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; X64-LABEL: shiftInput___64in32bitmode:
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; X64: # %bb.0: # %allocas
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; X64-NEXT: vmovq %rdi, %xmm1
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; X64-NEXT: vextractf128 $1, %ymm0, %xmm2
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; X64-NEXT: vpsrlq %xmm1, %xmm2, %xmm2
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; X64-NEXT: vpsrlq %xmm1, %xmm0, %xmm0
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; X64-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
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; X64-NEXT: retq
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allocas:
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%smear.0 = insertelement <4 x i64> undef, i64 %shiftval, i32 0
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%smear.7 = shufflevector <4 x i64> %smear.0, <4 x i64> undef, <4 x i32> zeroinitializer
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%bitop = lshr <4 x i64> %input, %smear.7
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ret <4 x i64> %bitop
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}
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define <4 x i64> @shiftInput___2x32bitcast(<4 x i64> %input, i32 %shiftval) nounwind {
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; X86-LABEL: shiftInput___2x32bitcast:
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; X86: # %bb.0: # %allocas
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; X86-NEXT: vextractf128 $1, %ymm0, %xmm1
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; X86-NEXT: vmovd {{.*#+}} xmm2 = mem[0],zero,zero,zero
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; X86-NEXT: vpsrlq %xmm2, %xmm1, %xmm1
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; X86-NEXT: vpsrlq %xmm2, %xmm0, %xmm0
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; X86-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
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; X86-NEXT: retl
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;
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; X64-LABEL: shiftInput___2x32bitcast:
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; X64: # %bb.0: # %allocas
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; X64-NEXT: vmovd %edi, %xmm1
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; X64-NEXT: vextractf128 $1, %ymm0, %xmm2
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; X64-NEXT: vpsrlq %xmm1, %xmm2, %xmm2
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; X64-NEXT: vpsrlq %xmm1, %xmm0, %xmm0
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; X64-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
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; X64-NEXT: retq
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allocas:
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%smear.0 = insertelement <8 x i32> zeroinitializer, i32 %shiftval, i32 0
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%smear.1 = insertelement <8 x i32> %smear.0, i32 %shiftval, i32 2
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%smear.2 = insertelement <8 x i32> %smear.1, i32 %shiftval, i32 4
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%smear.3 = insertelement <8 x i32> %smear.2, i32 %shiftval, i32 6
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%smear.4 = bitcast <8 x i32> %smear.3 to <4 x i64>
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%bitop = lshr <4 x i64> %input, %smear.4
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ret <4 x i64> %bitop
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}
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