Simon Pilgrim 6697e3354f [X86] combineADC - fold ADC(C1,C2,Carry) -> ADC(0,C1+C2,Carry)
If we're not relying on the flag result, we can fold the constants together into the RHS immediate operand and set the LHS operand to zero, simplifying for further folds.

We could do something similar if the flag result is in use and the constant fold doesn't affect it, but I don't have any real test cases for this yet.

As suggested by @davezarzycki on Issue #35256

Differential Revision: https://reviews.llvm.org/D122482
2022-03-30 09:11:55 +01:00

29 lines
927 B
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i386-unknown-linux-gnu -mcpu=corei7-avx -enable-misched=false | FileCheck %s
define i64 @main(i1 %tobool1) nounwind {
; CHECK-LABEL: main:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: testb $1, {{[0-9]+}}(%esp)
; CHECK-NEXT: movl $-12, %ecx
; CHECK-NEXT: movl $-1, %eax
; CHECK-NEXT: cmovnel %ecx, %eax
; CHECK-NEXT: xorl %ecx, %ecx
; CHECK-NEXT: movl %eax, %edx
; CHECK-NEXT: addl $-1, %edx
; CHECK-NEXT: movl $0, %edx
; CHECK-NEXT: adcl $-2, %edx
; CHECK-NEXT: cmovsl %ecx, %eax
; CHECK-NEXT: xorl %edx, %edx
; CHECK-NEXT: retl
entry:
%0 = zext i1 %tobool1 to i32
%. = xor i32 %0, 1
%.21 = select i1 %tobool1, i32 -12, i32 -1
%conv = sext i32 %.21 to i64
%1 = add i64 %conv, -1
%cmp10 = icmp slt i64 %1, 0
%sub17 = select i1 %cmp10, i64 0, i64 %conv
ret i64 %sub17
}