de34a940ae
AMD64 ABI mandates caller to specify the number of used SSE registers when passing variable arguments. GCC also provides option -mskip-rax-setup to skip the setup of rax when SSE is disabled. This helps to reduce the code size, see pr23258. Reviewed By: nickdesaulniers Differential Revision: https://reviews.llvm.org/D112413
73 lines
2.5 KiB
LLVM
73 lines
2.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefix=HAS-RAX
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; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+sse | FileCheck %s --check-prefix=HAS-RAX
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; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=-sse | FileCheck %s --check-prefix=NO-RAX
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define void @foo() {
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; HAS-RAX-LABEL: foo:
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; HAS-RAX: # %bb.0:
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; HAS-RAX-NEXT: movl $1, %edi
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; HAS-RAX-NEXT: xorl %eax, %eax
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; HAS-RAX-NEXT: jmp bar@PLT # TAILCALL
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;
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; NO-RAX-LABEL: foo:
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; NO-RAX: # %bb.0:
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; NO-RAX-NEXT: movl $1, %edi
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; NO-RAX-NEXT: jmp bar@PLT # TAILCALL
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tail call void (i32, ...) @bar(i32 1)
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ret void
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}
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define void @bar(i32, ...) nounwind {
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; HAS-RAX-LABEL: bar:
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; HAS-RAX: # %bb.0:
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; HAS-RAX-NEXT: subq $56, %rsp
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; HAS-RAX-NEXT: movq %rsi, -{{[0-9]+}}(%rsp)
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; HAS-RAX-NEXT: movq %rdx, -{{[0-9]+}}(%rsp)
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; HAS-RAX-NEXT: movq %rcx, -{{[0-9]+}}(%rsp)
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; HAS-RAX-NEXT: movq %r8, -{{[0-9]+}}(%rsp)
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; HAS-RAX-NEXT: movq %r9, -{{[0-9]+}}(%rsp)
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; HAS-RAX-NEXT: testb %al, %al
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; HAS-RAX-NEXT: je .LBB1_2
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; HAS-RAX-NEXT: # %bb.1:
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; HAS-RAX-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
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; HAS-RAX-NEXT: movaps %xmm1, -{{[0-9]+}}(%rsp)
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; HAS-RAX-NEXT: movaps %xmm2, -{{[0-9]+}}(%rsp)
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; HAS-RAX-NEXT: movaps %xmm3, -{{[0-9]+}}(%rsp)
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; HAS-RAX-NEXT: movaps %xmm4, -{{[0-9]+}}(%rsp)
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; HAS-RAX-NEXT: movaps %xmm5, (%rsp)
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; HAS-RAX-NEXT: movaps %xmm6, {{[0-9]+}}(%rsp)
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; HAS-RAX-NEXT: movaps %xmm7, {{[0-9]+}}(%rsp)
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; HAS-RAX-NEXT: .LBB1_2:
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; HAS-RAX-NEXT: leaq {{[0-9]+}}(%rsp), %rax
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; HAS-RAX-NEXT: movq %rax, 8
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; HAS-RAX-NEXT: leaq -{{[0-9]+}}(%rsp), %rax
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; HAS-RAX-NEXT: movq %rax, 16
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; HAS-RAX-NEXT: movl $8, 0
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; HAS-RAX-NEXT: movl $48, 4
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; HAS-RAX-NEXT: addq $56, %rsp
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; HAS-RAX-NEXT: retq
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;
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; NO-RAX-LABEL: bar:
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; NO-RAX: # %bb.0:
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; NO-RAX-NEXT: movq %rsi, -{{[0-9]+}}(%rsp)
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; NO-RAX-NEXT: movq %rdx, -{{[0-9]+}}(%rsp)
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; NO-RAX-NEXT: movq %rcx, -{{[0-9]+}}(%rsp)
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; NO-RAX-NEXT: movq %r8, -{{[0-9]+}}(%rsp)
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; NO-RAX-NEXT: movq %r9, -{{[0-9]+}}(%rsp)
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; NO-RAX-NEXT: leaq {{[0-9]+}}(%rsp), %rax
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; NO-RAX-NEXT: movq %rax, 8
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; NO-RAX-NEXT: leaq -{{[0-9]+}}(%rsp), %rax
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; NO-RAX-NEXT: movq %rax, 16
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; NO-RAX-NEXT: movl $8, 0
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; NO-RAX-NEXT: movl $48, 4
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; NO-RAX-NEXT: retq
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call void @llvm.va_start(i8* null)
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ret void
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}
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declare void @llvm.va_start(i8*)
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!llvm.module.flags = !{!0}
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!0 = !{i32 4, !"SkipRaxSetup", i32 1}
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