296 lines
6.9 KiB
LLVM
296 lines
6.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-apple-darwin | FileCheck %s --check-prefixes=X86
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; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s --check-prefixes=X64
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; rdar://7329206
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define zeroext i16 @t1(i16 zeroext %x) nounwind readnone ssp {
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; X86-LABEL: t1:
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; X86: ## %bb.0:
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; X86-NEXT: xorl %eax, %eax
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; X86-NEXT: cmpw $27, {{[0-9]+}}(%esp)
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; X86-NEXT: setae %al
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; X86-NEXT: shll $5, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: t1:
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; X64: ## %bb.0:
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; X64-NEXT: xorl %eax, %eax
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; X64-NEXT: cmpw $27, %di
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; X64-NEXT: setae %al
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; X64-NEXT: shll $5, %eax
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; X64-NEXT: retq
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%t0 = icmp ugt i16 %x, 26
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%if = select i1 %t0, i16 32, i16 0
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ret i16 %if
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}
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define zeroext i16 @t2(i16 zeroext %x) nounwind readnone ssp {
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; X86-LABEL: t2:
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; X86: ## %bb.0:
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; X86-NEXT: xorl %eax, %eax
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; X86-NEXT: cmpw $26, {{[0-9]+}}(%esp)
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; X86-NEXT: setb %al
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; X86-NEXT: shll $5, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: t2:
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; X64: ## %bb.0:
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; X64-NEXT: xorl %eax, %eax
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; X64-NEXT: cmpw $26, %di
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; X64-NEXT: setb %al
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; X64-NEXT: shll $5, %eax
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; X64-NEXT: retq
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%t0 = icmp ult i16 %x, 26
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%if = select i1 %t0, i16 32, i16 0
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ret i16 %if
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}
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define i64 @t3(i64 %x) nounwind readnone ssp {
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; X86-LABEL: t3:
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; X86: ## %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: cmpl $18, {{[0-9]+}}(%esp)
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; X86-NEXT: sbbl $0, %eax
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; X86-NEXT: setb %al
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; X86-NEXT: movzbl %al, %eax
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; X86-NEXT: shll $6, %eax
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; X86-NEXT: xorl %edx, %edx
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; X86-NEXT: retl
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;
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; X64-LABEL: t3:
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; X64: ## %bb.0:
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; X64-NEXT: xorl %eax, %eax
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; X64-NEXT: cmpq $18, %rdi
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; X64-NEXT: setb %al
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; X64-NEXT: shlq $6, %rax
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; X64-NEXT: retq
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%t0 = icmp ult i64 %x, 18
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%if = select i1 %t0, i64 64, i64 0
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ret i64 %if
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}
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@v4 = common global i32 0, align 4
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define i32 @t4(i32 %a) {
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; X86-LABEL: t4:
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; X86: ## %bb.0:
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; X86-NEXT: movl L_v4$non_lazy_ptr, %ecx
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; X86-NEXT: xorl %eax, %eax
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; X86-NEXT: cmpl $1, (%ecx)
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; X86-NEXT: adcw $1, %ax
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; X86-NEXT: shll $16, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: t4:
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; X64: ## %bb.0:
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; X64-NEXT: movq _v4@GOTPCREL(%rip), %rcx
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; X64-NEXT: xorl %eax, %eax
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; X64-NEXT: cmpl $1, (%rcx)
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; X64-NEXT: adcw $1, %ax
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; X64-NEXT: shll $16, %eax
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; X64-NEXT: retq
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%t0 = load i32, i32* @v4, align 4
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%not.tobool = icmp eq i32 %t0, 0
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%conv.i = sext i1 %not.tobool to i16
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%call.lobit = lshr i16 %conv.i, 15
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%add.i.1 = add nuw nsw i16 %call.lobit, 1
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%conv4.2 = zext i16 %add.i.1 to i32
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%add = shl nuw nsw i32 %conv4.2, 16
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ret i32 %add
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}
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define i8 @t5(i32 %a) #0 {
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; X86-LABEL: t5:
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; X86: ## %bb.0:
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; X86-NEXT: cmpl $0, {{[0-9]+}}(%esp)
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; X86-NEXT: setns %al
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; X86-NEXT: retl
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;
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; X64-LABEL: t5:
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; X64: ## %bb.0:
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; X64-NEXT: testl %edi, %edi
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; X64-NEXT: setns %al
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; X64-NEXT: retq
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%.lobit = lshr i32 %a, 31
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%trunc = trunc i32 %.lobit to i8
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%.not = xor i8 %trunc, 1
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ret i8 %.not
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}
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define zeroext i1 @t6(i32 %a) #0 {
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; X86-LABEL: t6:
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; X86: ## %bb.0:
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; X86-NEXT: cmpl $0, {{[0-9]+}}(%esp)
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; X86-NEXT: setns %al
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; X86-NEXT: retl
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;
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; X64-LABEL: t6:
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; X64: ## %bb.0:
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; X64-NEXT: testl %edi, %edi
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; X64-NEXT: setns %al
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; X64-NEXT: retq
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%.lobit = lshr i32 %a, 31
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%trunc = trunc i32 %.lobit to i1
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%.not = xor i1 %trunc, 1
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ret i1 %.not
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}
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; PR39174
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define zeroext i1 @t7(i32 %0) {
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; X86-LABEL: t7:
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; X86: ## %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl $19, %ecx
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; X86-NEXT: btl %eax, %ecx
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; X86-NEXT: setb %al
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; X86-NEXT: retl
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;
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; X64-LABEL: t7:
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; X64: ## %bb.0:
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; X64-NEXT: movl $19, %eax
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; X64-NEXT: btl %edi, %eax
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; X64-NEXT: setb %al
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; X64-NEXT: retq
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%2 = trunc i32 %0 to i5
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%3 = lshr i5 -13, %2
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%4 = and i5 %3, 1
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%5 = icmp ne i5 %4, 0
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ret i1 %5
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}
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define zeroext i1 @t8(i8 %0, i8 %1) {
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; X86-LABEL: t8:
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; X86: ## %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: btl %eax, %ecx
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; X86-NEXT: setb %al
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; X86-NEXT: retl
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;
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; X64-LABEL: t8:
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; X64: ## %bb.0:
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; X64-NEXT: btl %esi, %edi
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; X64-NEXT: setb %al
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; X64-NEXT: retq
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%3 = lshr i8 %0, %1
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%4 = and i8 %3, 1
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%5 = icmp ne i8 %4, 0
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ret i1 %5
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}
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define i64 @t9(i32 %0, i32 %1) {
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; X86-LABEL: t9:
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; X86: ## %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: xorl %eax, %eax
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; X86-NEXT: btl %edx, %ecx
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; X86-NEXT: setb %al
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; X86-NEXT: xorl %edx, %edx
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; X86-NEXT: retl
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;
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; X64-LABEL: t9:
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; X64: ## %bb.0:
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; X64-NEXT: xorl %eax, %eax
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; X64-NEXT: btl %esi, %edi
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; X64-NEXT: setb %al
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; X64-NEXT: retq
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%3 = lshr i32 %0, %1
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%4 = and i32 %3, 1
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%5 = icmp ne i32 %4, 0
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%6 = zext i1 %5 to i64
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ret i64 %6
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}
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define i32 @t10(i32 %0, i32 %1) {
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; X86-LABEL: t10:
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; X86: ## %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: xorl %eax, %eax
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; X86-NEXT: btl %edx, %ecx
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; X86-NEXT: setae %al
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; X86-NEXT: retl
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;
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; X64-LABEL: t10:
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; X64: ## %bb.0:
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; X64-NEXT: xorl %eax, %eax
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; X64-NEXT: btl %esi, %edi
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; X64-NEXT: setae %al
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; X64-NEXT: retq
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%3 = lshr i32 %0, %1
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%4 = and i32 %3, 1
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%5 = xor i32 %4, 1
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ret i32 %5
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}
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define i32 @t11(i32 %0, i32 %1) {
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; X86-LABEL: t11:
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; X86: ## %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: xorl %eax, %eax
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; X86-NEXT: btl %edx, %ecx
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; X86-NEXT: setae %al
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; X86-NEXT: retl
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;
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; X64-LABEL: t11:
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; X64: ## %bb.0:
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; X64-NEXT: xorl %eax, %eax
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; X64-NEXT: btl %esi, %edi
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; X64-NEXT: setae %al
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; X64-NEXT: retq
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%3 = xor i32 %0, -1
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%4 = lshr i32 %3, %1
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%5 = and i32 %4, 1
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ret i32 %5
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}
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define i32 @t12(i32 %0, i32 %1) {
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; X86-LABEL: t12:
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; X86: ## %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: xorl %eax, %eax
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; X86-NEXT: btl %edx, %ecx
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; X86-NEXT: setb %al
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; X86-NEXT: retl
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;
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; X64-LABEL: t12:
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; X64: ## %bb.0:
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; X64-NEXT: xorl %eax, %eax
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; X64-NEXT: btl %esi, %edi
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; X64-NEXT: setb %al
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; X64-NEXT: retq
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%3 = xor i32 %0, -1
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%4 = lshr i32 %3, %1
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%5 = and i32 %4, 1
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%6 = xor i32 %5, 1
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ret i32 %6
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}
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define i16 @shift_and(i16 %a) {
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; X86-LABEL: shift_and:
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; X86: ## %bb.0:
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; X86-NEXT: movb {{[0-9]+}}(%esp), %al
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; X86-NEXT: andb $4, %al
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; X86-NEXT: shrb $2, %al
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; X86-NEXT: movzbl %al, %eax
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; X86-NEXT: ## kill: def $ax killed $ax killed $eax
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; X86-NEXT: retl
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;
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; X64-LABEL: shift_and:
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; X64: ## %bb.0:
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: shrl $10, %eax
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; X64-NEXT: andl $1, %eax
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; X64-NEXT: ## kill: def $ax killed $ax killed $eax
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; X64-NEXT: retq
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%and = and i16 %a, 1024
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%cmp = icmp ne i16 %and, 0
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%conv = zext i1 %cmp to i16
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ret i16 %conv
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}
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attributes #0 = { "target-cpu"="skylake-avx512" }
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