0aef747b84
The motivation is that the update script has at least two deviations (`<...>@GOT`/`<...>@PLT`/ and not hiding pointer arithmetics) from what pretty much all the checklines were generated with, and most of the tests are still not updated, so each time one of the non-up-to-date tests is updated to see the effect of the code change, there is a lot of noise. Instead of having to deal with that each time, let's just deal with everything at once. This has been done via: ``` cd llvm-project/llvm/test/CodeGen/X86 grep -rl "; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py" | xargs -L1 <...>/llvm-project/llvm/utils/update_llc_test_checks.py --llc-binary <...>/llvm-project/build/bin/llc ``` Not all tests were regenerated, however.
931 lines
26 KiB
LLVM
931 lines
26 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -post-RA-scheduler=true | FileCheck %s
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declare dso_local void @bar(i32)
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declare dso_local void @car(i32)
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declare dso_local void @dar(i32)
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declare dso_local void @ear(i32)
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declare dso_local void @far(i32)
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declare i1 @qux()
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@GHJK = dso_local global i32 0
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@HABC = dso_local global i32 0
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; BranchFolding should tail-merge the stores since they all precede
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; direct branches to the same place.
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define dso_local void @tail_merge_me() nounwind {
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; CHECK-LABEL: tail_merge_me:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushq %rax
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; CHECK-NEXT: callq qux@PLT
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; CHECK-NEXT: testb $1, %al
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; CHECK-NEXT: je .LBB0_1
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; CHECK-NEXT: # %bb.6: # %A
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; CHECK-NEXT: xorl %edi, %edi
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; CHECK-NEXT: callq bar
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; CHECK-NEXT: jmp .LBB0_4
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; CHECK-NEXT: .LBB0_1: # %next
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; CHECK-NEXT: callq qux@PLT
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; CHECK-NEXT: testb $1, %al
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; CHECK-NEXT: je .LBB0_3
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; CHECK-NEXT: # %bb.2: # %B
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; CHECK-NEXT: movl $1, %edi
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; CHECK-NEXT: callq car
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; CHECK-NEXT: jmp .LBB0_4
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; CHECK-NEXT: .LBB0_3: # %C
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; CHECK-NEXT: movl $2, %edi
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; CHECK-NEXT: callq dar
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; CHECK-NEXT: .LBB0_4: # %M
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; CHECK-NEXT: movl $0, GHJK(%rip)
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; CHECK-NEXT: movl $1, HABC(%rip)
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; CHECK-NEXT: callq qux@PLT
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; CHECK-NEXT: testb $1, %al
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; CHECK-NEXT: je .LBB0_5
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; CHECK-NEXT: # %bb.7: # %return
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; CHECK-NEXT: movl $1000, %edi # imm = 0x3E8
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; CHECK-NEXT: callq ear
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; CHECK-NEXT: popq %rax
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; CHECK-NEXT: retq
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; CHECK-NEXT: .LBB0_5: # %altret
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; CHECK-NEXT: movl $1001, %edi # imm = 0x3E9
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; CHECK-NEXT: callq far
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; CHECK-NEXT: popq %rax
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; CHECK-NEXT: retq
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entry:
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%a = call i1 @qux()
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br i1 %a, label %A, label %next
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next:
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%b = call i1 @qux()
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br i1 %b, label %B, label %C
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A:
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call void @bar(i32 0)
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store i32 0, i32* @GHJK
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br label %M
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B:
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call void @car(i32 1)
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store i32 0, i32* @GHJK
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br label %M
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C:
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call void @dar(i32 2)
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store i32 0, i32* @GHJK
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br label %M
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M:
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store i32 1, i32* @HABC
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%c = call i1 @qux()
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br i1 %c, label %return, label %altret
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return:
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call void @ear(i32 1000)
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ret void
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altret:
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call void @far(i32 1001)
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ret void
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}
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declare i8* @choose(i8*, i8*)
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; BranchFolding should tail-duplicate the indirect jump to avoid
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; redundant branching.
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define dso_local void @tail_duplicate_me() nounwind {
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; CHECK-LABEL: tail_duplicate_me:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushq %r14
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; CHECK-NEXT: pushq %rbx
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; CHECK-NEXT: pushq %rax
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; CHECK-NEXT: callq qux@PLT
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; CHECK-NEXT: movl $.Ltmp0, %edi
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; CHECK-NEXT: movl $.Ltmp1, %esi
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; CHECK-NEXT: movl %eax, %ebx
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; CHECK-NEXT: callq choose@PLT
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; CHECK-NEXT: movq %rax, %r14
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; CHECK-NEXT: testb $1, %bl
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; CHECK-NEXT: je .LBB1_1
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; CHECK-NEXT: # %bb.7: # %A
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; CHECK-NEXT: xorl %edi, %edi
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; CHECK-NEXT: callq bar
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; CHECK-NEXT: movl $0, GHJK(%rip)
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; CHECK-NEXT: jmpq *%r14
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; CHECK-NEXT: .Ltmp0: # Block address taken
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; CHECK-NEXT: .LBB1_4: # %return
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; CHECK-NEXT: movl $1000, %edi # imm = 0x3E8
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; CHECK-NEXT: callq ear
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; CHECK-NEXT: jmp .LBB1_5
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; CHECK-NEXT: .LBB1_1: # %next
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; CHECK-NEXT: callq qux@PLT
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; CHECK-NEXT: testb $1, %al
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; CHECK-NEXT: je .LBB1_3
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; CHECK-NEXT: # %bb.2: # %B
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; CHECK-NEXT: movl $1, %edi
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; CHECK-NEXT: callq car
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; CHECK-NEXT: movl $0, GHJK(%rip)
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; CHECK-NEXT: jmpq *%r14
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; CHECK-NEXT: .Ltmp1: # Block address taken
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; CHECK-NEXT: .LBB1_6: # %altret
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; CHECK-NEXT: movl $1001, %edi # imm = 0x3E9
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; CHECK-NEXT: callq far
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; CHECK-NEXT: .LBB1_5: # %return
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; CHECK-NEXT: addq $8, %rsp
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; CHECK-NEXT: popq %rbx
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; CHECK-NEXT: popq %r14
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; CHECK-NEXT: retq
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; CHECK-NEXT: .LBB1_3: # %C
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; CHECK-NEXT: movl $2, %edi
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; CHECK-NEXT: callq dar
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; CHECK-NEXT: movl $0, GHJK(%rip)
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; CHECK-NEXT: jmpq *%r14
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entry:
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%a = call i1 @qux()
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%c = call i8* @choose(i8* blockaddress(@tail_duplicate_me, %return),
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i8* blockaddress(@tail_duplicate_me, %altret))
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br i1 %a, label %A, label %next
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next:
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%b = call i1 @qux()
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br i1 %b, label %B, label %C
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A:
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call void @bar(i32 0)
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store i32 0, i32* @GHJK
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br label %M
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B:
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call void @car(i32 1)
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store i32 0, i32* @GHJK
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br label %M
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C:
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call void @dar(i32 2)
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store i32 0, i32* @GHJK
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br label %M
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M:
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indirectbr i8* %c, [label %return, label %altret]
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return:
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call void @ear(i32 1000)
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ret void
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altret:
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call void @far(i32 1001)
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ret void
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}
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; BranchFolding shouldn't try to merge the tails of two blocks
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; with only a branch in common, regardless of the fallthrough situation.
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define i1 @dont_merge_oddly(float* %result) nounwind {
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; CHECK-LABEL: dont_merge_oddly:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
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; CHECK-NEXT: movss {{.*#+}} xmm2 = mem[0],zero,zero,zero
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; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; CHECK-NEXT: ucomiss %xmm1, %xmm2
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; CHECK-NEXT: jbe .LBB2_3
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; CHECK-NEXT: # %bb.1: # %bb
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; CHECK-NEXT: ucomiss %xmm0, %xmm1
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; CHECK-NEXT: ja .LBB2_4
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; CHECK-NEXT: .LBB2_2: # %bb30
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; CHECK-NEXT: movb $1, %al
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; CHECK-NEXT: retq
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; CHECK-NEXT: .LBB2_3: # %bb21
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; CHECK-NEXT: ucomiss %xmm0, %xmm2
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; CHECK-NEXT: jbe .LBB2_2
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; CHECK-NEXT: .LBB2_4: # %bb26
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: retq
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entry:
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%tmp4 = getelementptr float, float* %result, i32 2
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%tmp5 = load float, float* %tmp4, align 4
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%tmp7 = getelementptr float, float* %result, i32 4
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%tmp8 = load float, float* %tmp7, align 4
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%tmp10 = getelementptr float, float* %result, i32 6
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%tmp11 = load float, float* %tmp10, align 4
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%tmp12 = fcmp olt float %tmp8, %tmp11
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br i1 %tmp12, label %bb, label %bb21
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bb:
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%tmp23469 = fcmp olt float %tmp5, %tmp8
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br i1 %tmp23469, label %bb26, label %bb30
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bb21:
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%tmp23 = fcmp olt float %tmp5, %tmp11
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br i1 %tmp23, label %bb26, label %bb30
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bb26:
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ret i1 0
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bb30:
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ret i1 1
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}
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; Do any-size tail-merging when two candidate blocks will both require
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; an unconditional jump to complete a two-way conditional branch.
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;
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; This test only works when register allocation happens to use %rax for both
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; load addresses.
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%0 = type { %struct.rtx_def* }
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%struct.lang_decl = type opaque
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%struct.rtx_def = type { i16, i8, i8, [1 x %union.rtunion] }
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%struct.tree_decl = type { [24 x i8], i8*, i32, %union.tree_node*, i32, i8, i8, i8, i8, %union.tree_node*, %union.tree_node*, %union.tree_node*, %union.tree_node*, %union.tree_node*, %union.tree_node*, %union.tree_node*, %union.tree_node*, %union.tree_node*, %struct.rtx_def*, %union..2anon, %0, %union.tree_node*, %struct.lang_decl* }
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%union..2anon = type { i32 }
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%union.rtunion = type { i8* }
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%union.tree_node = type { %struct.tree_decl }
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define fastcc void @c_expand_expr_stmt(%union.tree_node* %expr) nounwind {
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; CHECK-LABEL: c_expand_expr_stmt:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushq %rbx
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: testb %al, %al
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; CHECK-NEXT: jne .LBB3_9
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; CHECK-NEXT: # %bb.1: # %entry
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; CHECK-NEXT: movb 0, %bl
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: testb %al, %al
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; CHECK-NEXT: jne .LBB3_8
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; CHECK-NEXT: # %bb.2: # %bb.i
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: testb %al, %al
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; CHECK-NEXT: je .LBB3_8
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; CHECK-NEXT: # %bb.3: # %lvalue_p.exit
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; CHECK-NEXT: movq 0, %rax
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; CHECK-NEXT: movzbl (%rax), %ecx
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; CHECK-NEXT: testl %ecx, %ecx
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; CHECK-NEXT: je .LBB3_10
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; CHECK-NEXT: # %bb.4: # %lvalue_p.exit
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; CHECK-NEXT: cmpl $2, %ecx
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; CHECK-NEXT: jne .LBB3_15
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; CHECK-NEXT: # %bb.5: # %bb.i1
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; CHECK-NEXT: movq 32(%rax), %rax
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; CHECK-NEXT: movzbl 16(%rax), %ecx
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; CHECK-NEXT: testl %ecx, %ecx
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; CHECK-NEXT: je .LBB3_13
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; CHECK-NEXT: # %bb.6: # %bb.i1
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; CHECK-NEXT: cmpl $2, %ecx
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; CHECK-NEXT: jne .LBB3_15
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; CHECK-NEXT: # %bb.7: # %bb.i.i
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; CHECK-NEXT: xorl %edi, %edi
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; CHECK-NEXT: callq lvalue_p@PLT
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; CHECK-NEXT: testl %eax, %eax
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; CHECK-NEXT: setne %al
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; CHECK-NEXT: jmp .LBB3_16
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; CHECK-NEXT: .LBB3_8: # %bb1
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; CHECK-NEXT: cmpb $23, %bl
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; CHECK-NEXT: .LBB3_9: # %bb3
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; CHECK-NEXT: .LBB3_15:
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: .LBB3_16: # %lvalue_p.exit4
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; CHECK-NEXT: testb %al, %al
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; CHECK-NEXT: jne .LBB3_9
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; CHECK-NEXT: # %bb.17: # %lvalue_p.exit4
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; CHECK-NEXT: testb %bl, %bl
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; CHECK-NEXT: .LBB3_10: # %bb2.i3
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; CHECK-NEXT: movq 8(%rax), %rax
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; CHECK-NEXT: movb 16(%rax), %cl
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: cmpb $23, %cl
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; CHECK-NEXT: je .LBB3_16
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; CHECK-NEXT: # %bb.11: # %bb2.i3
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; CHECK-NEXT: cmpb $16, %cl
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; CHECK-NEXT: je .LBB3_16
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; CHECK-NEXT: jmp .LBB3_9
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; CHECK-NEXT: .LBB3_13: # %bb2.i.i2
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; CHECK-NEXT: movq 8(%rax), %rax
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; CHECK-NEXT: movb 16(%rax), %cl
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: cmpb $16, %cl
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; CHECK-NEXT: je .LBB3_16
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; CHECK-NEXT: # %bb.14: # %bb2.i.i2
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; CHECK-NEXT: cmpb $23, %cl
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; CHECK-NEXT: je .LBB3_16
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; CHECK-NEXT: jmp .LBB3_9
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entry:
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%tmp4 = load i8, i8* null, align 8 ; <i8> [#uses=3]
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switch i8 %tmp4, label %bb3 [
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i8 18, label %bb
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]
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bb: ; preds = %entry
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switch i32 undef, label %bb1 [
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i32 0, label %bb2.i
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i32 37, label %bb.i
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]
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bb.i: ; preds = %bb
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switch i32 undef, label %bb1 [
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i32 0, label %lvalue_p.exit
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]
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bb2.i: ; preds = %bb
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br label %bb3
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lvalue_p.exit: ; preds = %bb.i
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%tmp21 = load %union.tree_node*, %union.tree_node** null, align 8 ; <%union.tree_node*> [#uses=3]
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%tmp22 = getelementptr inbounds %union.tree_node, %union.tree_node* %tmp21, i64 0, i32 0, i32 0, i64 0 ; <i8*> [#uses=1]
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%tmp23 = load i8, i8* %tmp22, align 8 ; <i8> [#uses=1]
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%tmp24 = zext i8 %tmp23 to i32 ; <i32> [#uses=1]
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switch i32 %tmp24, label %lvalue_p.exit4 [
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i32 0, label %bb2.i3
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i32 2, label %bb.i1
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]
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bb.i1: ; preds = %lvalue_p.exit
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%tmp25 = getelementptr inbounds %union.tree_node, %union.tree_node* %tmp21, i64 0, i32 0, i32 2 ; <i32*> [#uses=1]
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%tmp26 = bitcast i32* %tmp25 to %union.tree_node** ; <%union.tree_node**> [#uses=1]
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%tmp27 = load %union.tree_node*, %union.tree_node** %tmp26, align 8 ; <%union.tree_node*> [#uses=2]
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%tmp28 = getelementptr inbounds %union.tree_node, %union.tree_node* %tmp27, i64 0, i32 0, i32 0, i64 16 ; <i8*> [#uses=1]
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%tmp29 = load i8, i8* %tmp28, align 8 ; <i8> [#uses=1]
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%tmp30 = zext i8 %tmp29 to i32 ; <i32> [#uses=1]
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switch i32 %tmp30, label %lvalue_p.exit4 [
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i32 0, label %bb2.i.i2
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i32 2, label %bb.i.i
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]
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bb.i.i: ; preds = %bb.i1
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%tmp34 = tail call fastcc i32 @lvalue_p(%union.tree_node* null) nounwind ; <i32> [#uses=1]
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%phitmp = icmp ne i32 %tmp34, 0 ; <i1> [#uses=1]
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br label %lvalue_p.exit4
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bb2.i.i2: ; preds = %bb.i1
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%tmp35 = getelementptr inbounds %union.tree_node, %union.tree_node* %tmp27, i64 0, i32 0, i32 0, i64 8 ; <i8*> [#uses=1]
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%tmp36 = bitcast i8* %tmp35 to %union.tree_node** ; <%union.tree_node**> [#uses=1]
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%tmp37 = load %union.tree_node*, %union.tree_node** %tmp36, align 8 ; <%union.tree_node*> [#uses=1]
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%tmp38 = getelementptr inbounds %union.tree_node, %union.tree_node* %tmp37, i64 0, i32 0, i32 0, i64 16 ; <i8*> [#uses=1]
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%tmp39 = load i8, i8* %tmp38, align 8 ; <i8> [#uses=1]
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switch i8 %tmp39, label %bb2 [
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i8 16, label %lvalue_p.exit4
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i8 23, label %lvalue_p.exit4
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]
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bb2.i3: ; preds = %lvalue_p.exit
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%tmp40 = getelementptr inbounds %union.tree_node, %union.tree_node* %tmp21, i64 0, i32 0, i32 0, i64 8 ; <i8*> [#uses=1]
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%tmp41 = bitcast i8* %tmp40 to %union.tree_node** ; <%union.tree_node**> [#uses=1]
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%tmp42 = load %union.tree_node*, %union.tree_node** %tmp41, align 8 ; <%union.tree_node*> [#uses=1]
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%tmp43 = getelementptr inbounds %union.tree_node, %union.tree_node* %tmp42, i64 0, i32 0, i32 0, i64 16 ; <i8*> [#uses=1]
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%tmp44 = load i8, i8* %tmp43, align 8 ; <i8> [#uses=1]
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switch i8 %tmp44, label %bb2 [
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i8 16, label %lvalue_p.exit4
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i8 23, label %lvalue_p.exit4
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]
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lvalue_p.exit4: ; preds = %bb2.i3, %bb2.i3, %bb2.i.i2, %bb2.i.i2, %bb.i.i, %bb.i1, %lvalue_p.exit
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%tmp45 = phi i1 [ %phitmp, %bb.i.i ], [ false, %bb2.i.i2 ], [ false, %bb2.i.i2 ], [ false, %bb.i1 ], [ false, %bb2.i3 ], [ false, %bb2.i3 ], [ false, %lvalue_p.exit ] ; <i1> [#uses=1]
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%tmp46 = icmp eq i8 %tmp4, 0 ; <i1> [#uses=1]
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%or.cond = or i1 %tmp45, %tmp46 ; <i1> [#uses=1]
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br i1 %or.cond, label %bb2, label %bb3
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bb1: ; preds = %bb2.i.i, %bb.i, %bb
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|
%.old = icmp eq i8 %tmp4, 23 ; <i1> [#uses=1]
|
|
br i1 %.old, label %bb2, label %bb3
|
|
|
|
bb2: ; preds = %bb1, %lvalue_p.exit4, %bb2.i3, %bb2.i.i2
|
|
br label %bb3
|
|
|
|
bb3: ; preds = %bb2, %bb1, %lvalue_p.exit4, %bb2.i, %entry
|
|
%expr_addr.0 = phi %union.tree_node* [ null, %bb2 ], [ %expr, %bb2.i ], [ %expr, %entry ], [ %expr, %bb1 ], [ %expr, %lvalue_p.exit4 ] ; <%union.tree_node*> [#uses=0]
|
|
unreachable
|
|
}
|
|
|
|
declare fastcc i32 @lvalue_p(%union.tree_node* nocapture) nounwind readonly
|
|
|
|
declare fastcc %union.tree_node* @default_conversion(%union.tree_node*) nounwind
|
|
|
|
|
|
; If one tail merging candidate falls through into the other,
|
|
; tail merging is likely profitable regardless of how few
|
|
; instructions are involved. This function should have only
|
|
; one ret instruction.
|
|
|
|
define dso_local void @foo(i1* %V) nounwind {
|
|
; CHECK-LABEL: foo:
|
|
; CHECK: # %bb.0: # %entry
|
|
; CHECK-NEXT: testq %rdi, %rdi
|
|
; CHECK-NEXT: je .LBB4_2
|
|
; CHECK-NEXT: # %bb.1: # %bb
|
|
; CHECK-NEXT: pushq %rax
|
|
; CHECK-NEXT: callq func
|
|
; CHECK-NEXT: popq %rax
|
|
; CHECK-NEXT: .LBB4_2: # %return
|
|
; CHECK-NEXT: retq
|
|
entry:
|
|
%t0 = icmp eq i1* %V, null
|
|
br i1 %t0, label %return, label %bb
|
|
|
|
bb:
|
|
call void @func()
|
|
ret void
|
|
|
|
return:
|
|
ret void
|
|
}
|
|
|
|
declare dso_local void @func()
|
|
|
|
; one - One instruction may be tail-duplicated even with optsize.
|
|
|
|
@XYZ = external dso_local global i32
|
|
|
|
declare dso_local void @tail_call_me()
|
|
|
|
define dso_local void @one(i32 %v) nounwind optsize {
|
|
; CHECK-LABEL: one:
|
|
; CHECK: # %bb.0: # %entry
|
|
; CHECK-NEXT: testl %edi, %edi
|
|
; CHECK-NEXT: je .LBB5_3
|
|
; CHECK-NEXT: # %bb.1: # %bby
|
|
; CHECK-NEXT: cmpl $16, %edi
|
|
; CHECK-NEXT: je .LBB5_4
|
|
; CHECK-NEXT: # %bb.2: # %bb7
|
|
; CHECK-NEXT: jmp tail_call_me # TAILCALL
|
|
; CHECK-NEXT: .LBB5_3: # %bbx
|
|
; CHECK-NEXT: cmpl $128, %edi
|
|
; CHECK-NEXT: jne tail_call_me # TAILCALL
|
|
; CHECK-NEXT: .LBB5_4: # %return
|
|
; CHECK-NEXT: retq
|
|
entry:
|
|
%0 = icmp eq i32 %v, 0
|
|
br i1 %0, label %bbx, label %bby
|
|
|
|
bby:
|
|
switch i32 %v, label %bb7 [
|
|
i32 16, label %return
|
|
]
|
|
|
|
bb7:
|
|
tail call void @tail_call_me()
|
|
ret void
|
|
|
|
bbx:
|
|
switch i32 %v, label %bb12 [
|
|
i32 128, label %return
|
|
]
|
|
|
|
bb12:
|
|
tail call void @tail_call_me()
|
|
ret void
|
|
|
|
return:
|
|
ret void
|
|
}
|
|
|
|
define dso_local void @one_pgso(i32 %v) nounwind !prof !14 {
|
|
; CHECK-LABEL: one_pgso:
|
|
; CHECK: # %bb.0: # %entry
|
|
; CHECK-NEXT: testl %edi, %edi
|
|
; CHECK-NEXT: je .LBB6_3
|
|
; CHECK-NEXT: # %bb.1: # %bby
|
|
; CHECK-NEXT: cmpl $16, %edi
|
|
; CHECK-NEXT: je .LBB6_4
|
|
; CHECK-NEXT: # %bb.2: # %bb7
|
|
; CHECK-NEXT: jmp tail_call_me # TAILCALL
|
|
; CHECK-NEXT: .LBB6_3: # %bbx
|
|
; CHECK-NEXT: cmpl $128, %edi
|
|
; CHECK-NEXT: jne tail_call_me # TAILCALL
|
|
; CHECK-NEXT: .LBB6_4: # %return
|
|
; CHECK-NEXT: retq
|
|
entry:
|
|
%0 = icmp eq i32 %v, 0
|
|
br i1 %0, label %bbx, label %bby
|
|
|
|
bby:
|
|
switch i32 %v, label %bb7 [
|
|
i32 16, label %return
|
|
]
|
|
|
|
bb7:
|
|
tail call void @tail_call_me()
|
|
ret void
|
|
|
|
bbx:
|
|
switch i32 %v, label %bb12 [
|
|
i32 128, label %return
|
|
]
|
|
|
|
bb12:
|
|
tail call void @tail_call_me()
|
|
ret void
|
|
|
|
return:
|
|
ret void
|
|
}
|
|
|
|
; two - Same as one, but with two instructions in the common
|
|
; tail instead of one. This is too much to be merged, given
|
|
; the optsize attribute.
|
|
|
|
define dso_local void @two() nounwind optsize {
|
|
; CHECK-LABEL: two:
|
|
; CHECK: # %bb.0: # %entry
|
|
; CHECK-NEXT: xorl %eax, %eax
|
|
; CHECK-NEXT: testb %al, %al
|
|
; CHECK-NEXT: xorl %eax, %eax
|
|
; CHECK-NEXT: testb %al, %al
|
|
; CHECK-NEXT: je .LBB7_1
|
|
; CHECK-NEXT: # %bb.2: # %return
|
|
; CHECK-NEXT: retq
|
|
; CHECK-NEXT: .LBB7_1: # %bb7
|
|
; CHECK-NEXT: movl $0, XYZ(%rip)
|
|
; CHECK-NEXT: movl $1, XYZ(%rip)
|
|
entry:
|
|
%0 = icmp eq i32 undef, 0
|
|
br i1 %0, label %bbx, label %bby
|
|
|
|
bby:
|
|
switch i32 undef, label %bb7 [
|
|
i32 16, label %return
|
|
]
|
|
|
|
bb7:
|
|
store volatile i32 0, i32* @XYZ
|
|
store volatile i32 1, i32* @XYZ
|
|
unreachable
|
|
|
|
bbx:
|
|
switch i32 undef, label %bb12 [
|
|
i32 128, label %return
|
|
]
|
|
|
|
bb12:
|
|
store volatile i32 0, i32* @XYZ
|
|
store volatile i32 1, i32* @XYZ
|
|
unreachable
|
|
|
|
return:
|
|
ret void
|
|
}
|
|
|
|
define dso_local void @two_pgso() nounwind !prof !14 {
|
|
; CHECK-LABEL: two_pgso:
|
|
; CHECK: # %bb.0: # %entry
|
|
; CHECK-NEXT: xorl %eax, %eax
|
|
; CHECK-NEXT: testb %al, %al
|
|
; CHECK-NEXT: xorl %eax, %eax
|
|
; CHECK-NEXT: testb %al, %al
|
|
; CHECK-NEXT: je .LBB8_1
|
|
; CHECK-NEXT: # %bb.2: # %return
|
|
; CHECK-NEXT: retq
|
|
; CHECK-NEXT: .LBB8_1: # %bb7
|
|
; CHECK-NEXT: movl $0, XYZ(%rip)
|
|
; CHECK-NEXT: movl $1, XYZ(%rip)
|
|
entry:
|
|
%0 = icmp eq i32 undef, 0
|
|
br i1 %0, label %bbx, label %bby
|
|
|
|
bby:
|
|
switch i32 undef, label %bb7 [
|
|
i32 16, label %return
|
|
]
|
|
|
|
bb7:
|
|
store volatile i32 0, i32* @XYZ
|
|
store volatile i32 1, i32* @XYZ
|
|
unreachable
|
|
|
|
bbx:
|
|
switch i32 undef, label %bb12 [
|
|
i32 128, label %return
|
|
]
|
|
|
|
bb12:
|
|
store volatile i32 0, i32* @XYZ
|
|
store volatile i32 1, i32* @XYZ
|
|
unreachable
|
|
|
|
return:
|
|
ret void
|
|
}
|
|
|
|
; two_minsize - Same as two, but with minsize instead of optsize.
|
|
|
|
define dso_local void @two_minsize() nounwind minsize {
|
|
; CHECK-LABEL: two_minsize:
|
|
; CHECK: # %bb.0: # %entry
|
|
; CHECK-NEXT: xorl %eax, %eax
|
|
; CHECK-NEXT: testb %al, %al
|
|
; CHECK-NEXT: xorl %eax, %eax
|
|
; CHECK-NEXT: testb %al, %al
|
|
; CHECK-NEXT: je .LBB9_1
|
|
; CHECK-NEXT: # %bb.2: # %return
|
|
; CHECK-NEXT: retq
|
|
; CHECK-NEXT: .LBB9_1: # %bb7
|
|
; CHECK-NEXT: movl $0, XYZ(%rip)
|
|
; CHECK-NEXT: movl $1, XYZ(%rip)
|
|
entry:
|
|
%0 = icmp eq i32 undef, 0
|
|
br i1 %0, label %bbx, label %bby
|
|
|
|
bby:
|
|
switch i32 undef, label %bb7 [
|
|
i32 16, label %return
|
|
]
|
|
|
|
bb7:
|
|
store volatile i32 0, i32* @XYZ
|
|
store volatile i32 1, i32* @XYZ
|
|
unreachable
|
|
|
|
bbx:
|
|
switch i32 undef, label %bb12 [
|
|
i32 128, label %return
|
|
]
|
|
|
|
bb12:
|
|
store volatile i32 0, i32* @XYZ
|
|
store volatile i32 1, i32* @XYZ
|
|
unreachable
|
|
|
|
return:
|
|
ret void
|
|
}
|
|
|
|
; two_nosize - Same as two, but without the optsize attribute.
|
|
; Now two instructions are enough to be tail-duplicated.
|
|
|
|
define dso_local void @two_nosize(i32 %x, i32 %y, i32 %z) nounwind {
|
|
; CHECK-LABEL: two_nosize:
|
|
; CHECK: # %bb.0: # %entry
|
|
; CHECK-NEXT: testl %edi, %edi
|
|
; CHECK-NEXT: je .LBB10_3
|
|
; CHECK-NEXT: # %bb.1: # %bby
|
|
; CHECK-NEXT: testl %esi, %esi
|
|
; CHECK-NEXT: je .LBB10_4
|
|
; CHECK-NEXT: # %bb.2: # %bb7
|
|
; CHECK-NEXT: movl $0, XYZ(%rip)
|
|
; CHECK-NEXT: jmp tail_call_me # TAILCALL
|
|
; CHECK-NEXT: .LBB10_3: # %bbx
|
|
; CHECK-NEXT: cmpl $-1, %edx
|
|
; CHECK-NEXT: je .LBB10_4
|
|
; CHECK-NEXT: # %bb.5: # %bb12
|
|
; CHECK-NEXT: movl $0, XYZ(%rip)
|
|
; CHECK-NEXT: jmp tail_call_me # TAILCALL
|
|
; CHECK-NEXT: .LBB10_4: # %return
|
|
; CHECK-NEXT: retq
|
|
entry:
|
|
%0 = icmp eq i32 %x, 0
|
|
br i1 %0, label %bbx, label %bby
|
|
|
|
bby:
|
|
switch i32 %y, label %bb7 [
|
|
i32 0, label %return
|
|
]
|
|
|
|
bb7:
|
|
store volatile i32 0, i32* @XYZ
|
|
tail call void @tail_call_me()
|
|
ret void
|
|
|
|
bbx:
|
|
switch i32 %z, label %bb12 [
|
|
i32 -1, label %return
|
|
]
|
|
|
|
bb12:
|
|
store volatile i32 0, i32* @XYZ
|
|
tail call void @tail_call_me()
|
|
ret void
|
|
|
|
return:
|
|
ret void
|
|
}
|
|
|
|
; Tail-merging should merge the two ret instructions since one side
|
|
; can fall-through into the ret and the other side has to branch anyway.
|
|
|
|
define i64 @TESTE(i64 %parami, i64 %paraml) nounwind readnone {
|
|
; CHECK-LABEL: TESTE:
|
|
; CHECK: # %bb.0: # %entry
|
|
; CHECK-NEXT: testq %rdi, %rdi
|
|
; CHECK-NEXT: movl $1, %eax
|
|
; CHECK-NEXT: cmovgq %rdi, %rax
|
|
; CHECK-NEXT: testq %rsi, %rsi
|
|
; CHECK-NEXT: jle .LBB11_2
|
|
; CHECK-NEXT: # %bb.1: # %bb.nph
|
|
; CHECK-NEXT: imulq %rdi, %rsi
|
|
; CHECK-NEXT: movq %rsi, %rax
|
|
; CHECK-NEXT: .LBB11_2: # %for.end
|
|
; CHECK-NEXT: retq
|
|
entry:
|
|
%cmp = icmp slt i64 %parami, 1 ; <i1> [#uses=1]
|
|
%varx.0 = select i1 %cmp, i64 1, i64 %parami ; <i64> [#uses=1]
|
|
%cmp410 = icmp slt i64 %paraml, 1 ; <i1> [#uses=1]
|
|
br i1 %cmp410, label %for.end, label %bb.nph
|
|
|
|
bb.nph: ; preds = %entry
|
|
%tmp15 = mul i64 %paraml, %parami ; <i64> [#uses=1]
|
|
ret i64 %tmp15
|
|
|
|
for.end: ; preds = %entry
|
|
ret i64 %varx.0
|
|
}
|
|
|
|
; We should tail merge small blocks that don't end in a tail call or return
|
|
; instruction. Those blocks are typically unreachable and will be placed
|
|
; out-of-line after the main return, so we should try to eliminate as many of
|
|
; them as possible.
|
|
|
|
declare dso_local void @abort()
|
|
define dso_local void @merge_aborts() {
|
|
; CHECK-LABEL: merge_aborts:
|
|
; CHECK: # %bb.0: # %entry
|
|
; CHECK-NEXT: pushq %rax
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 16
|
|
; CHECK-NEXT: callq qux@PLT
|
|
; CHECK-NEXT: testb $1, %al
|
|
; CHECK-NEXT: je .LBB12_5
|
|
; CHECK-NEXT: # %bb.1: # %cont1
|
|
; CHECK-NEXT: callq qux@PLT
|
|
; CHECK-NEXT: testb $1, %al
|
|
; CHECK-NEXT: je .LBB12_5
|
|
; CHECK-NEXT: # %bb.2: # %cont2
|
|
; CHECK-NEXT: callq qux@PLT
|
|
; CHECK-NEXT: testb $1, %al
|
|
; CHECK-NEXT: je .LBB12_5
|
|
; CHECK-NEXT: # %bb.3: # %cont3
|
|
; CHECK-NEXT: callq qux@PLT
|
|
; CHECK-NEXT: testb $1, %al
|
|
; CHECK-NEXT: je .LBB12_5
|
|
; CHECK-NEXT: # %bb.4: # %cont4
|
|
; CHECK-NEXT: popq %rax
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 8
|
|
; CHECK-NEXT: retq
|
|
; CHECK-NEXT: .LBB12_5: # %abort1
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 16
|
|
; CHECK-NEXT: callq abort
|
|
entry:
|
|
%c1 = call i1 @qux()
|
|
br i1 %c1, label %cont1, label %abort1
|
|
abort1:
|
|
call void @abort()
|
|
unreachable
|
|
cont1:
|
|
%c2 = call i1 @qux()
|
|
br i1 %c2, label %cont2, label %abort2
|
|
abort2:
|
|
call void @abort()
|
|
unreachable
|
|
cont2:
|
|
%c3 = call i1 @qux()
|
|
br i1 %c3, label %cont3, label %abort3
|
|
abort3:
|
|
call void @abort()
|
|
unreachable
|
|
cont3:
|
|
%c4 = call i1 @qux()
|
|
br i1 %c4, label %cont4, label %abort4
|
|
abort4:
|
|
call void @abort()
|
|
unreachable
|
|
cont4:
|
|
ret void
|
|
}
|
|
|
|
; Use alternating abort functions so that the blocks we wish to merge are not
|
|
; layout successors during branch folding.
|
|
|
|
declare dso_local void @alt_abort()
|
|
|
|
define dso_local void @merge_alternating_aborts() {
|
|
; CHECK-LABEL: merge_alternating_aborts:
|
|
; CHECK: # %bb.0: # %entry
|
|
; CHECK-NEXT: pushq %rax
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 16
|
|
; CHECK-NEXT: callq qux@PLT
|
|
; CHECK-NEXT: testb $1, %al
|
|
; CHECK-NEXT: je .LBB13_5
|
|
; CHECK-NEXT: # %bb.1: # %cont1
|
|
; CHECK-NEXT: callq qux@PLT
|
|
; CHECK-NEXT: testb $1, %al
|
|
; CHECK-NEXT: je .LBB13_6
|
|
; CHECK-NEXT: # %bb.2: # %cont2
|
|
; CHECK-NEXT: callq qux@PLT
|
|
; CHECK-NEXT: testb $1, %al
|
|
; CHECK-NEXT: je .LBB13_5
|
|
; CHECK-NEXT: # %bb.3: # %cont3
|
|
; CHECK-NEXT: callq qux@PLT
|
|
; CHECK-NEXT: testb $1, %al
|
|
; CHECK-NEXT: je .LBB13_6
|
|
; CHECK-NEXT: # %bb.4: # %cont4
|
|
; CHECK-NEXT: popq %rax
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 8
|
|
; CHECK-NEXT: retq
|
|
; CHECK-NEXT: .LBB13_5: # %abort1
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 16
|
|
; CHECK-NEXT: callq abort
|
|
; CHECK-NEXT: .LBB13_6: # %abort2
|
|
; CHECK-NEXT: callq alt_abort
|
|
entry:
|
|
%c1 = call i1 @qux()
|
|
br i1 %c1, label %cont1, label %abort1
|
|
abort1:
|
|
call void @abort()
|
|
unreachable
|
|
cont1:
|
|
%c2 = call i1 @qux()
|
|
br i1 %c2, label %cont2, label %abort2
|
|
abort2:
|
|
call void @alt_abort()
|
|
unreachable
|
|
cont2:
|
|
%c3 = call i1 @qux()
|
|
br i1 %c3, label %cont3, label %abort3
|
|
abort3:
|
|
call void @abort()
|
|
unreachable
|
|
cont3:
|
|
%c4 = call i1 @qux()
|
|
br i1 %c4, label %cont4, label %abort4
|
|
abort4:
|
|
call void @alt_abort()
|
|
unreachable
|
|
cont4:
|
|
ret void
|
|
}
|
|
|
|
; This triggers a situation where a new block (bb4 is split) is created and then
|
|
; would be passed to the PGSO interface llvm::shouldOptimizeForSize().
|
|
@GV = dso_local global i32 0
|
|
define dso_local void @bfi_new_block_pgso(i32 %c) nounwind {
|
|
; CHECK-LABEL: bfi_new_block_pgso:
|
|
; CHECK: # %bb.0: # %entry
|
|
; CHECK-NEXT: testl %edi, %edi
|
|
; CHECK-NEXT: je .LBB14_4
|
|
; CHECK-NEXT: # %bb.1: # %bb1
|
|
; CHECK-NEXT: pushq %rax
|
|
; CHECK-NEXT: cmpl $16, %edi
|
|
; CHECK-NEXT: je .LBB14_6
|
|
; CHECK-NEXT: # %bb.2: # %bb1
|
|
; CHECK-NEXT: cmpl $17, %edi
|
|
; CHECK-NEXT: je .LBB14_7
|
|
; CHECK-NEXT: # %bb.3: # %bb4
|
|
; CHECK-NEXT: popq %rax
|
|
; CHECK-NEXT: jmp tail_call_me # TAILCALL
|
|
; CHECK-NEXT: .LBB14_4: # %bb5
|
|
; CHECK-NEXT: cmpl $128, %edi
|
|
; CHECK-NEXT: jne .LBB14_8
|
|
; CHECK-NEXT: # %bb.5: # %return
|
|
; CHECK-NEXT: retq
|
|
; CHECK-NEXT: .LBB14_6: # %bb3
|
|
; CHECK-NEXT: movl $0, GV(%rip)
|
|
; CHECK-NEXT: .LBB14_7: # %bb4
|
|
; CHECK-NEXT: callq func
|
|
; CHECK-NEXT: popq %rax
|
|
; CHECK-NEXT: .LBB14_8: # %bb6
|
|
; CHECK-NEXT: jmp tail_call_me # TAILCALL
|
|
entry:
|
|
%0 = icmp eq i32 %c, 0
|
|
br i1 %0, label %bb5, label %bb1
|
|
|
|
bb1:
|
|
switch i32 %c, label %bb4 [
|
|
i32 16, label %bb3
|
|
i32 17, label %bb2
|
|
]
|
|
|
|
bb2:
|
|
call void @func()
|
|
br label %bb4
|
|
|
|
bb3:
|
|
store i32 0, i32* @GV
|
|
call void @func()
|
|
br label %bb4
|
|
|
|
bb4:
|
|
tail call void @tail_call_me()
|
|
br label %return
|
|
|
|
bb5:
|
|
switch i32 %c, label %bb6 [
|
|
i32 128, label %return
|
|
]
|
|
|
|
bb6:
|
|
tail call void @tail_call_me()
|
|
br label %return
|
|
|
|
return:
|
|
ret void
|
|
}
|
|
|
|
!llvm.module.flags = !{!0}
|
|
!0 = !{i32 1, !"ProfileSummary", !1}
|
|
!1 = !{!2, !3, !4, !5, !6, !7, !8, !9}
|
|
!2 = !{!"ProfileFormat", !"InstrProf"}
|
|
!3 = !{!"TotalCount", i64 10000}
|
|
!4 = !{!"MaxCount", i64 10}
|
|
!5 = !{!"MaxInternalCount", i64 1}
|
|
!6 = !{!"MaxFunctionCount", i64 1000}
|
|
!7 = !{!"NumCounts", i64 3}
|
|
!8 = !{!"NumFunctions", i64 3}
|
|
!9 = !{!"DetailedSummary", !10}
|
|
!10 = !{!11, !12, !13}
|
|
!11 = !{i32 10000, i64 100, i32 1}
|
|
!12 = !{i32 999000, i64 100, i32 1}
|
|
!13 = !{i32 999999, i64 1, i32 2}
|
|
!14 = !{!"function_entry_count", i64 0}
|