This allows these optimisations to apply to e.g. `urem i16` directly
before `urem` is promoted to i32 on architectures where i16 operations
are not intrinsically legal (such as on Aarch64). The legalization then
later can happen more directly and generated code gets a chance to avoid
wasting time on computing results in types wider than necessary, in the end.
Seems like mostly an improvement in terms of results at least as far as x86_64 and aarch64 are concerned, with a few regressions here and there. It also helps in preventing regressions in changes like {D87976}.
Reviewed By: lebedev.ri
Differential Revision: https://reviews.llvm.org/D88785
327 lines
9.9 KiB
LLVM
327 lines
9.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=i686-unknown-linux-gnu < %s | FileCheck %s --check-prefix=X86
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; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s --check-prefix=X64
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define i1 @t32_3_1(i32 %X) nounwind {
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; X86-LABEL: t32_3_1:
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; X86: # %bb.0:
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; X86-NEXT: imull $-1431655765, {{[0-9]+}}(%esp), %eax # imm = 0xAAAAAAAB
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; X86-NEXT: addl $1431655765, %eax # imm = 0x55555555
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; X86-NEXT: cmpl $1431655765, %eax # imm = 0x55555555
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; X86-NEXT: setb %al
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; X86-NEXT: retl
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;
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; X64-LABEL: t32_3_1:
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; X64: # %bb.0:
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; X64-NEXT: imull $-1431655765, %edi, %eax # imm = 0xAAAAAAAB
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; X64-NEXT: addl $1431655765, %eax # imm = 0x55555555
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; X64-NEXT: cmpl $1431655765, %eax # imm = 0x55555555
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; X64-NEXT: setb %al
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; X64-NEXT: retq
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%urem = urem i32 %X, 3
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%cmp = icmp eq i32 %urem, 1
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ret i1 %cmp
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}
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define i1 @t32_3_2(i32 %X) nounwind {
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; X86-LABEL: t32_3_2:
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; X86: # %bb.0:
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; X86-NEXT: imull $-1431655765, {{[0-9]+}}(%esp), %eax # imm = 0xAAAAAAAB
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; X86-NEXT: addl $-1431655766, %eax # imm = 0xAAAAAAAA
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; X86-NEXT: cmpl $1431655765, %eax # imm = 0x55555555
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; X86-NEXT: setb %al
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; X86-NEXT: retl
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;
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; X64-LABEL: t32_3_2:
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; X64: # %bb.0:
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; X64-NEXT: imull $-1431655765, %edi, %eax # imm = 0xAAAAAAAB
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; X64-NEXT: addl $-1431655766, %eax # imm = 0xAAAAAAAA
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; X64-NEXT: cmpl $1431655765, %eax # imm = 0x55555555
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; X64-NEXT: setb %al
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; X64-NEXT: retq
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%urem = urem i32 %X, 3
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%cmp = icmp eq i32 %urem, 2
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ret i1 %cmp
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}
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define i1 @t32_5_1(i32 %X) nounwind {
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; X86-LABEL: t32_5_1:
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; X86: # %bb.0:
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; X86-NEXT: imull $-858993459, {{[0-9]+}}(%esp), %eax # imm = 0xCCCCCCCD
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; X86-NEXT: addl $858993459, %eax # imm = 0x33333333
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; X86-NEXT: cmpl $858993459, %eax # imm = 0x33333333
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; X86-NEXT: setb %al
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; X86-NEXT: retl
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;
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; X64-LABEL: t32_5_1:
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; X64: # %bb.0:
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; X64-NEXT: imull $-858993459, %edi, %eax # imm = 0xCCCCCCCD
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; X64-NEXT: addl $858993459, %eax # imm = 0x33333333
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; X64-NEXT: cmpl $858993459, %eax # imm = 0x33333333
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; X64-NEXT: setb %al
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; X64-NEXT: retq
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%urem = urem i32 %X, 5
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%cmp = icmp eq i32 %urem, 1
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ret i1 %cmp
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}
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define i1 @t32_5_2(i32 %X) nounwind {
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; X86-LABEL: t32_5_2:
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; X86: # %bb.0:
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; X86-NEXT: imull $-858993459, {{[0-9]+}}(%esp), %eax # imm = 0xCCCCCCCD
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; X86-NEXT: addl $1717986918, %eax # imm = 0x66666666
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; X86-NEXT: cmpl $858993459, %eax # imm = 0x33333333
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; X86-NEXT: setb %al
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; X86-NEXT: retl
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;
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; X64-LABEL: t32_5_2:
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; X64: # %bb.0:
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; X64-NEXT: imull $-858993459, %edi, %eax # imm = 0xCCCCCCCD
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; X64-NEXT: addl $1717986918, %eax # imm = 0x66666666
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; X64-NEXT: cmpl $858993459, %eax # imm = 0x33333333
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; X64-NEXT: setb %al
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; X64-NEXT: retq
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%urem = urem i32 %X, 5
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%cmp = icmp eq i32 %urem, 2
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ret i1 %cmp
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}
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define i1 @t32_5_3(i32 %X) nounwind {
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; X86-LABEL: t32_5_3:
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; X86: # %bb.0:
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; X86-NEXT: imull $-858993459, {{[0-9]+}}(%esp), %eax # imm = 0xCCCCCCCD
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; X86-NEXT: addl $-1717986919, %eax # imm = 0x99999999
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; X86-NEXT: cmpl $858993459, %eax # imm = 0x33333333
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; X86-NEXT: setb %al
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; X86-NEXT: retl
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;
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; X64-LABEL: t32_5_3:
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; X64: # %bb.0:
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; X64-NEXT: imull $-858993459, %edi, %eax # imm = 0xCCCCCCCD
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; X64-NEXT: addl $-1717986919, %eax # imm = 0x99999999
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; X64-NEXT: cmpl $858993459, %eax # imm = 0x33333333
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; X64-NEXT: setb %al
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; X64-NEXT: retq
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%urem = urem i32 %X, 5
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%cmp = icmp eq i32 %urem, 3
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ret i1 %cmp
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}
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define i1 @t32_5_4(i32 %X) nounwind {
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; X86-LABEL: t32_5_4:
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; X86: # %bb.0:
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; X86-NEXT: imull $-858993459, {{[0-9]+}}(%esp), %eax # imm = 0xCCCCCCCD
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; X86-NEXT: addl $-858993460, %eax # imm = 0xCCCCCCCC
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; X86-NEXT: cmpl $858993459, %eax # imm = 0x33333333
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; X86-NEXT: setb %al
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; X86-NEXT: retl
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;
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; X64-LABEL: t32_5_4:
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; X64: # %bb.0:
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; X64-NEXT: imull $-858993459, %edi, %eax # imm = 0xCCCCCCCD
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; X64-NEXT: addl $-858993460, %eax # imm = 0xCCCCCCCC
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; X64-NEXT: cmpl $858993459, %eax # imm = 0x33333333
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; X64-NEXT: setb %al
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; X64-NEXT: retq
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%urem = urem i32 %X, 5
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%cmp = icmp eq i32 %urem, 4
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ret i1 %cmp
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}
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define i1 @t32_6_1(i32 %X) nounwind {
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; X86-LABEL: t32_6_1:
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; X86: # %bb.0:
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; X86-NEXT: imull $-1431655765, {{[0-9]+}}(%esp), %eax # imm = 0xAAAAAAAB
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; X86-NEXT: addl $1431655765, %eax # imm = 0x55555555
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; X86-NEXT: rorl %eax
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; X86-NEXT: cmpl $715827883, %eax # imm = 0x2AAAAAAB
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; X86-NEXT: setb %al
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; X86-NEXT: retl
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;
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; X64-LABEL: t32_6_1:
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; X64: # %bb.0:
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; X64-NEXT: imull $-1431655765, %edi, %eax # imm = 0xAAAAAAAB
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; X64-NEXT: addl $1431655765, %eax # imm = 0x55555555
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; X64-NEXT: rorl %eax
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; X64-NEXT: cmpl $715827883, %eax # imm = 0x2AAAAAAB
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; X64-NEXT: setb %al
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; X64-NEXT: retq
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%urem = urem i32 %X, 6
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%cmp = icmp eq i32 %urem, 1
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ret i1 %cmp
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}
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define i1 @t32_6_2(i32 %X) nounwind {
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; X86-LABEL: t32_6_2:
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; X86: # %bb.0:
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; X86-NEXT: imull $-1431655765, {{[0-9]+}}(%esp), %eax # imm = 0xAAAAAAAB
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; X86-NEXT: addl $-1431655766, %eax # imm = 0xAAAAAAAA
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; X86-NEXT: rorl %eax
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; X86-NEXT: cmpl $715827883, %eax # imm = 0x2AAAAAAB
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; X86-NEXT: setb %al
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; X86-NEXT: retl
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;
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; X64-LABEL: t32_6_2:
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; X64: # %bb.0:
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; X64-NEXT: imull $-1431655765, %edi, %eax # imm = 0xAAAAAAAB
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; X64-NEXT: addl $-1431655766, %eax # imm = 0xAAAAAAAA
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; X64-NEXT: rorl %eax
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; X64-NEXT: cmpl $715827883, %eax # imm = 0x2AAAAAAB
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; X64-NEXT: setb %al
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; X64-NEXT: retq
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%urem = urem i32 %X, 6
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%cmp = icmp eq i32 %urem, 2
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ret i1 %cmp
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}
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define i1 @t32_6_3(i32 %X) nounwind {
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; X86-LABEL: t32_6_3:
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; X86: # %bb.0:
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; X86-NEXT: imull $-1431655765, {{[0-9]+}}(%esp), %eax # imm = 0xAAAAAAAB
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; X86-NEXT: decl %eax
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; X86-NEXT: rorl %eax
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; X86-NEXT: cmpl $715827883, %eax # imm = 0x2AAAAAAB
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; X86-NEXT: setb %al
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; X86-NEXT: retl
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;
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; X64-LABEL: t32_6_3:
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; X64: # %bb.0:
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; X64-NEXT: imull $-1431655765, %edi, %eax # imm = 0xAAAAAAAB
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; X64-NEXT: decl %eax
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; X64-NEXT: rorl %eax
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; X64-NEXT: cmpl $715827883, %eax # imm = 0x2AAAAAAB
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; X64-NEXT: setb %al
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; X64-NEXT: retq
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%urem = urem i32 %X, 6
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%cmp = icmp eq i32 %urem, 3
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ret i1 %cmp
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}
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define i1 @t32_6_4(i32 %X) nounwind {
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; X86-LABEL: t32_6_4:
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; X86: # %bb.0:
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; X86-NEXT: imull $-1431655765, {{[0-9]+}}(%esp), %eax # imm = 0xAAAAAAAB
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; X86-NEXT: addl $1431655764, %eax # imm = 0x55555554
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; X86-NEXT: rorl %eax
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; X86-NEXT: cmpl $715827882, %eax # imm = 0x2AAAAAAA
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; X86-NEXT: setb %al
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; X86-NEXT: retl
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;
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; X64-LABEL: t32_6_4:
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; X64: # %bb.0:
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; X64-NEXT: imull $-1431655765, %edi, %eax # imm = 0xAAAAAAAB
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; X64-NEXT: addl $1431655764, %eax # imm = 0x55555554
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; X64-NEXT: rorl %eax
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; X64-NEXT: cmpl $715827882, %eax # imm = 0x2AAAAAAA
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; X64-NEXT: setb %al
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; X64-NEXT: retq
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%urem = urem i32 %X, 6
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%cmp = icmp eq i32 %urem, 4
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ret i1 %cmp
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}
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define i1 @t32_6_5(i32 %X) nounwind {
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; X86-LABEL: t32_6_5:
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; X86: # %bb.0:
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; X86-NEXT: imull $-1431655765, {{[0-9]+}}(%esp), %eax # imm = 0xAAAAAAAB
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; X86-NEXT: addl $-1431655767, %eax # imm = 0xAAAAAAA9
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; X86-NEXT: rorl %eax
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; X86-NEXT: cmpl $715827882, %eax # imm = 0x2AAAAAAA
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; X86-NEXT: setb %al
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; X86-NEXT: retl
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;
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; X64-LABEL: t32_6_5:
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; X64: # %bb.0:
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; X64-NEXT: imull $-1431655765, %edi, %eax # imm = 0xAAAAAAAB
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; X64-NEXT: addl $-1431655767, %eax # imm = 0xAAAAAAA9
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; X64-NEXT: rorl %eax
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; X64-NEXT: cmpl $715827882, %eax # imm = 0x2AAAAAAA
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; X64-NEXT: setb %al
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; X64-NEXT: retq
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%urem = urem i32 %X, 6
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%cmp = icmp eq i32 %urem, 5
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ret i1 %cmp
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}
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;-------------------------------------------------------------------------------
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; Other widths.
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define i1 @t16_3_2(i16 %X) nounwind {
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; X86-LABEL: t16_3_2:
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; X86: # %bb.0:
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; X86-NEXT: imull $-21845, {{[0-9]+}}(%esp), %eax # imm = 0xAAAB
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; X86-NEXT: addl $-21846, %eax # imm = 0xAAAA
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; X86-NEXT: movzwl %ax, %eax
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; X86-NEXT: cmpl $21845, %eax # imm = 0x5555
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; X86-NEXT: setb %al
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; X86-NEXT: retl
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;
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; X64-LABEL: t16_3_2:
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; X64: # %bb.0:
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; X64-NEXT: imull $-21845, %edi, %eax # imm = 0xAAAB
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; X64-NEXT: addl $-21846, %eax # imm = 0xAAAA
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; X64-NEXT: movzwl %ax, %eax
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; X64-NEXT: cmpl $21845, %eax # imm = 0x5555
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; X64-NEXT: setb %al
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; X64-NEXT: retq
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%urem = urem i16 %X, 3
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%cmp = icmp eq i16 %urem, 2
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ret i1 %cmp
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}
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define i1 @t8_3_2(i8 %X) nounwind {
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; X86-LABEL: t8_3_2:
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; X86: # %bb.0:
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; X86-NEXT: imull $-85, {{[0-9]+}}(%esp), %eax
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; X86-NEXT: addb $-86, %al
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; X86-NEXT: cmpb $85, %al
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; X86-NEXT: setb %al
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; X86-NEXT: retl
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;
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; X64-LABEL: t8_3_2:
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; X64: # %bb.0:
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; X64-NEXT: imull $-85, %edi, %eax
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; X64-NEXT: addb $-86, %al
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; X64-NEXT: cmpb $85, %al
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; X64-NEXT: setb %al
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; X64-NEXT: retq
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%urem = urem i8 %X, 3
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%cmp = icmp eq i8 %urem, 2
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ret i1 %cmp
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}
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define i1 @t64_3_2(i64 %X) nounwind {
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; X86-LABEL: t64_3_2:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl $-1431655765, %edx # imm = 0xAAAAAAAB
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; X86-NEXT: movl %ecx, %eax
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; X86-NEXT: mull %edx
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; X86-NEXT: imull $-1431655766, %ecx, %ecx # imm = 0xAAAAAAAA
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; X86-NEXT: addl %edx, %ecx
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; X86-NEXT: imull $-1431655765, {{[0-9]+}}(%esp), %edx # imm = 0xAAAAAAAB
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; X86-NEXT: addl %ecx, %edx
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; X86-NEXT: addl $-1431655766, %eax # imm = 0xAAAAAAAA
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; X86-NEXT: adcl $-1431655766, %edx # imm = 0xAAAAAAAA
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; X86-NEXT: cmpl $1431655765, %eax # imm = 0x55555555
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; X86-NEXT: sbbl $1431655765, %edx # imm = 0x55555555
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; X86-NEXT: setb %al
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; X86-NEXT: retl
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;
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; X64-LABEL: t64_3_2:
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; X64: # %bb.0:
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; X64-NEXT: movabsq $-6148914691236517205, %rax # imm = 0xAAAAAAAAAAAAAAAB
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; X64-NEXT: imulq %rdi, %rax
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; X64-NEXT: movabsq $-6148914691236517206, %rcx # imm = 0xAAAAAAAAAAAAAAAA
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; X64-NEXT: addq %rax, %rcx
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; X64-NEXT: movabsq $6148914691236517205, %rax # imm = 0x5555555555555555
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; X64-NEXT: cmpq %rax, %rcx
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; X64-NEXT: setb %al
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; X64-NEXT: retq
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%urem = urem i64 %X, 3
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%cmp = icmp eq i64 %urem, 2
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ret i1 %cmp
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}
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