de2fed6152
The unrolling code was previously inserting new cloned blocks at the end of the function. The result of this with typical loop structures is that the new iterations are placed far from the initial iteration. With unrolling, the general assumption is that the a) the loop is reasonable hot, and b) the first Count-1 copies of the loop are rarely (if ever) loop exiting. As such, placing Count-1 copies out of line is a fairly poor code placement choice. We'd much rather fall through into the hot (non-exiting) path. For code with branch profiles, later layout would fix this, but this may have a positive impact on non-PGO compiled code. However, the real motivation for this change isn't performance. Its readability and human understanding. Having to jump around long distances in an IR file to trace an unrolled loop structure is error prone and tedious.
63 lines
3.0 KiB
LLVM
63 lines
3.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -loop-unroll -unroll-allow-partial -S %s -verify-loop-info -verify-dom-info -verify-loop-lcssa | FileCheck %s
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@table = internal unnamed_addr global [344 x i32] zeroinitializer, align 16
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define i32 @test_partial_unroll_with_breakout_at_iter0() {
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;
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;
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; CHECK-LABEL: @test_partial_unroll_with_breakout_at_iter0(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[FOR_HEADER:%.*]]
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; CHECK: for.header:
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; CHECK-NEXT: [[RED:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[RED_NEXT_3:%.*]], [[FOR_LATCH_3:%.*]] ]
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; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[IV_NEXT_3:%.*]], [[FOR_LATCH_3]] ]
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; CHECK-NEXT: [[RED_NEXT:%.*]] = add nuw nsw i32 10, [[RED]]
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; CHECK-NEXT: [[IV_NEXT:%.*]] = add nuw nsw i64 [[IV]], 2
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; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [344 x i32], [344 x i32]* @table, i64 0, i64 [[IV_NEXT]]
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; CHECK-NEXT: store i32 [[RED_NEXT]], i32* [[PTR]], align 4
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; CHECK-NEXT: br label [[FOR_LATCH:%.*]]
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; CHECK: for.latch:
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; CHECK-NEXT: [[RED_NEXT_1:%.*]] = add nuw nsw i32 10, [[RED_NEXT]]
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; CHECK-NEXT: [[IV_NEXT_1:%.*]] = add nuw nsw i64 [[IV_NEXT]], 2
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; CHECK-NEXT: [[PTR_1:%.*]] = getelementptr inbounds [344 x i32], [344 x i32]* @table, i64 0, i64 [[IV_NEXT_1]]
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; CHECK-NEXT: store i32 [[RED_NEXT_1]], i32* [[PTR_1]], align 4
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; CHECK-NEXT: br label [[FOR_LATCH_1:%.*]]
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; CHECK: for.latch.1:
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; CHECK-NEXT: [[RED_NEXT_2:%.*]] = add nuw nsw i32 10, [[RED_NEXT_1]]
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; CHECK-NEXT: [[IV_NEXT_2:%.*]] = add nuw nsw i64 [[IV_NEXT_1]], 2
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; CHECK-NEXT: [[PTR_2:%.*]] = getelementptr inbounds [344 x i32], [344 x i32]* @table, i64 0, i64 [[IV_NEXT_2]]
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; CHECK-NEXT: store i32 [[RED_NEXT_2]], i32* [[PTR_2]], align 4
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; CHECK-NEXT: br label [[FOR_LATCH_2:%.*]]
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; CHECK: for.latch.2:
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; CHECK-NEXT: [[RED_NEXT_3]] = add nuw nsw i32 10, [[RED_NEXT_2]]
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; CHECK-NEXT: [[IV_NEXT_3]] = add nuw nsw i64 [[IV_NEXT_2]], 2
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; CHECK-NEXT: [[PTR_3:%.*]] = getelementptr inbounds [344 x i32], [344 x i32]* @table, i64 0, i64 [[IV_NEXT_3]]
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; CHECK-NEXT: store i32 [[RED_NEXT_3]], i32* [[PTR_3]], align 4
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; CHECK-NEXT: [[EXITCOND_1_I_3:%.*]] = icmp eq i64 [[IV_NEXT_3]], 344
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; CHECK-NEXT: br i1 [[EXITCOND_1_I_3]], label [[EXIT:%.*]], label [[FOR_LATCH_3]]
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; CHECK: for.latch.3:
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; CHECK-NEXT: br label [[FOR_HEADER]]
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; CHECK: exit:
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; CHECK-NEXT: ret i32 0
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;
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entry:
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br label %for.header
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for.header: ; preds = %for.body28.i.for.body28.i_crit_edge, %for.body.i
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%red = phi i32 [ 0, %entry ], [ %red.next, %for.latch ]
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %for.latch ]
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%red.next = add i32 10, %red
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%iv.next = add nuw nsw i64 %iv, 2
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%ptr = getelementptr inbounds [344 x i32], [344 x i32]* @table, i64 0, i64 %iv.next
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store i32 %red.next, i32* %ptr, align 4
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%exitcond.1.i = icmp eq i64 %iv.next, 344
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br i1 %exitcond.1.i, label %exit, label %for.latch
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for.latch: ; preds = %for.header
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br label %for.header
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exit:
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ret i32 0
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}
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