8ebb3eac02
The legacy PM is deprecated, so update a bunch of lit tests running opt to use the new PM syntax when specifying the pipeline. In this patch focus has been put on test cases for ConstantMerge, ConstraintElimination, CorrelatedValuePropagation, GlobalDCE, GlobalOpt, SCCP, TailCallElim and PredicateInfo. Differential Revision: https://reviews.llvm.org/D114516
196 lines
6.6 KiB
LLVM
196 lines
6.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -passes=ipsccp -S %s | FileCheck %s
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; A few test cases exposing crashes with the initial range implementation.
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@global.2 = external dso_local unnamed_addr constant [25 x i8], align 1
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@global = internal local_unnamed_addr global i32 0, align 4
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@global.3 = internal local_unnamed_addr global i32 0, align 4
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define void @main(i8** %arg) {
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; CHECK-LABEL: @main(
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; CHECK-NEXT: bb:
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; CHECK-NEXT: [[TMP:%.*]] = getelementptr inbounds i8*, i8** [[ARG:%.*]], i64 undef
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; CHECK-NEXT: [[TMP1:%.*]] = load i8*, i8** [[TMP]], align 8
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; CHECK-NEXT: [[TMP2:%.*]] = load i8, i8* [[TMP1]], align 1
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; CHECK-NEXT: [[TMP3:%.*]] = sext i8 [[TMP2]] to i32
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; CHECK-NEXT: [[TMP4:%.*]] = icmp ne i32 [[TMP3]], 45
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; CHECK-NEXT: [[TMP5:%.*]] = select i1 [[TMP4]], i32 2, i32 4
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; CHECK-NEXT: ret void
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;
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bb:
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%tmp = getelementptr inbounds i8*, i8** %arg, i64 undef
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%tmp1 = load i8*, i8** %tmp, align 8
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%tmp2 = load i8, i8* %tmp1, align 1
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%tmp3 = sext i8 %tmp2 to i32
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%tmp4 = icmp ne i32 %tmp3, 45
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%tmp5 = select i1 %tmp4, i32 2, i32 4
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ret void
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}
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define void @ham() local_unnamed_addr {
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; CHECK-LABEL: @ham(
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; CHECK-NEXT: bb:
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; CHECK-NEXT: br label [[BB1:%.*]]
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; CHECK: bb1:
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; CHECK-NEXT: [[TMP:%.*]] = icmp slt i32 undef, 40
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; CHECK-NEXT: br i1 [[TMP]], label [[BB2:%.*]], label [[BB4:%.*]]
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; CHECK: bb2:
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; CHECK-NEXT: br label [[BB7:%.*]]
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; CHECK: bb3:
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; CHECK-NEXT: br label [[BB4]]
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; CHECK: bb4:
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; CHECK-NEXT: [[TMP5:%.*]] = phi i64 [ 0, [[BB1]] ], [ 15, [[BB3:%.*]] ]
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; CHECK-NEXT: [[TMP6:%.*]] = add i64 [[TMP5]], add (i64 xor (i64 ptrtoint ([25 x i8]* @global.2 to i64), i64 -1), i64 1)
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; CHECK-NEXT: unreachable
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; CHECK: bb7:
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; CHECK-NEXT: br label [[BB3]]
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;
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bb:
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br label %bb1
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bb1: ; preds = %bb
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%tmp = icmp slt i32 undef, 40
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br i1 %tmp, label %bb2, label %bb4
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bb2: ; preds = %bb1
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br label %bb7
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bb3: ; preds = %bb7
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br label %bb4
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bb4: ; preds = %bb3, %bb1
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%tmp5 = phi i64 [ 0, %bb1 ], [ %tmp10, %bb3 ]
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%tmp6 = add i64 %tmp5, add (i64 xor (i64 ptrtoint ([25 x i8]* @global.2 to i64), i64 -1), i64 1)
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unreachable
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bb7: ; preds = %bb2
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%tmp8 = add i64 0, 15
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%tmp9 = add i64 %tmp8, 0
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%tmp10 = add i64 %tmp9, 0
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br label %bb3
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}
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declare i32 @barney.4()
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define void @wobble() {
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; CHECK-LABEL: @wobble(
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; CHECK-NEXT: bb:
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; CHECK-NEXT: [[TMP:%.*]] = load i32, i32* @global, align 4
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; CHECK-NEXT: store i32 [[TMP]], i32* @global.3, align 4
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; CHECK-NEXT: ret void
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;
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bb:
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%tmp = load i32, i32* @global, align 4
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store i32 %tmp, i32* @global.3, align 4
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ret void
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}
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define i32 @wobble.5(i32 %arg) {
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bb:
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%tmp = load i32, i32* @global.3, align 4
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%tmp1 = sdiv i32 0, %tmp
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ret i32 %tmp1
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}
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define void @eggs() {
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; CHECK-LABEL: @eggs(
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; CHECK-NEXT: bb:
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; CHECK-NEXT: br label [[BB1:%.*]]
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; CHECK: bb1:
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; CHECK-NEXT: [[TMP:%.*]] = phi i32 [ 0, [[BB:%.*]] ], [ [[TMP2:%.*]], [[BB1]] ]
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; CHECK-NEXT: [[TMP2]] = add nsw i32 [[TMP]], 1
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; CHECK-NEXT: [[TMP3:%.*]] = call i32 @barney.4()
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; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i32 [[TMP3]], 1
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; CHECK-NEXT: br i1 [[TMP4]], label [[BB1]], label [[BB5:%.*]]
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; CHECK: bb5:
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; CHECK-NEXT: store i32 [[TMP2]], i32* @global, align 4
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; CHECK-NEXT: ret void
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;
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bb:
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br label %bb1
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bb1: ; preds = %bb1, %bb
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%tmp = phi i32 [ 0, %bb ], [ %tmp2, %bb1 ]
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%tmp2 = add nsw i32 %tmp, 1
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%tmp3 = call i32 @barney.4()
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%tmp4 = icmp eq i32 %tmp3, 1
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br i1 %tmp4, label %bb1, label %bb5
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bb5: ; preds = %bb1
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store i32 %tmp2, i32* @global, align 4
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ret void
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}
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declare i32* @bar(i32) local_unnamed_addr #3
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; Function Attrs: nounwind ssp uwtable
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define { i8, i32* } @struct_crash(i32 %BitWidth) local_unnamed_addr #0 align 2 {
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; CHECK-LABEL: @struct_crash(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: switch i32 [[BITWIDTH:%.*]], label [[IF_END:%.*]] [
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; CHECK-NEXT: i32 1, label [[CLEANUP:%.*]]
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; CHECK-NEXT: i32 8, label [[SW_BB1_I:%.*]]
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; CHECK-NEXT: ]
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; CHECK: sw.bb1.i:
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; CHECK-NEXT: br label [[CLEANUP]]
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; CHECK: if.end:
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; CHECK-NEXT: [[CALL_I:%.*]] = tail call i32* @bar(i32 [[BITWIDTH]])
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; CHECK-NEXT: br label [[CLEANUP]]
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; CHECK: cleanup:
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; CHECK-NEXT: [[V1:%.*]] = phi i32* [ [[CALL_I]], [[IF_END]] ], [ null, [[SW_BB1_I]] ], [ null, [[ENTRY:%.*]] ]
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; CHECK-NEXT: [[V2:%.*]] = phi i8 [ 0, [[IF_END]] ], [ 3, [[SW_BB1_I]] ], [ 2, [[ENTRY]] ]
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; CHECK-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue { i8, i32* } undef, i8 [[V2]], 0
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; CHECK-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue { i8, i32* } [[DOTFCA_0_INSERT]], i32* [[V1]], 1
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; CHECK-NEXT: ret { i8, i32* } [[DOTFCA_1_INSERT]]
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;
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entry:
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switch i32 %BitWidth, label %if.end [
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i32 1, label %cleanup
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i32 8, label %sw.bb1.i
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]
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sw.bb1.i: ; preds = %entry
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br label %cleanup
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if.end: ; preds = %entry
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%call.i = tail call i32* @bar(i32 %BitWidth)
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br label %cleanup
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cleanup: ; preds = %entry, %sw.bb1.i, %sw.bb2.i, %sw.bb3.i, %sw.bb4.i, %sw.bb5.i, %if.end
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%v1 = phi i32* [ %call.i, %if.end ], [ null, %sw.bb1.i ], [ null, %entry ]
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%v2 = phi i8 [ 0, %if.end ], [ 3, %sw.bb1.i ], [ 2, %entry ]
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%.fca.0.insert = insertvalue { i8, i32* } undef, i8 %v2, 0
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%.fca.1.insert = insertvalue { i8, i32* } %.fca.0.insert, i32* %v1, 1
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ret { i8, i32* } %.fca.1.insert
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}
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define i64 @crash_ctpop(i1 %cond, i32* %addr) {
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; CHECK-LABEL: @crash_ctpop(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 [[COND:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
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; CHECK: if.then:
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; CHECK-NEXT: ret i64 0
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; CHECK: if.else:
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; CHECK-NEXT: [[LV:%.*]] = load i32, i32* [[ADDR:%.*]], align 8
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; CHECK-NEXT: [[ANDV:%.*]] = and i32 [[LV]], 16777215
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; CHECK-NEXT: [[TRUNCV:%.*]] = zext i32 [[ANDV]] to i64
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; CHECK-NEXT: [[RES:%.*]] = tail call i64 @llvm.ctpop.i64(i64 [[TRUNCV]])
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; CHECK-NEXT: ret i64 [[RES]]
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;
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entry:
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br i1 %cond, label %if.then, label %if.else
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if.then: ; preds = %entry
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ret i64 0
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if.else: ; preds = %entry
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%lv = load i32, i32* %addr, align 8
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%andv = and i32 %lv, 16777215
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%truncv = zext i32 %andv to i64
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%res = tail call i64 @llvm.ctpop.i64(i64 %truncv)
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ret i64 %res
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}
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declare i64 @llvm.ctpop.i64(i64)
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