d65cc85977
No need to schedule entry nodes where all instructions are not memory read/write instructions and their operands are either constants, or arguments, or phis, or instructions from others blocks, or their users are phis or from the other blocks. The resulting vector instructions can be placed at the beginning of the basic block without scheduling (if operands does not need to be scheduled) or at the end of the block (if users are outside of the block). It may save some compile time and scheduling resources. Differential Revision: https://reviews.llvm.org/D121121
54 lines
2.2 KiB
LLVM
54 lines
2.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -slp-vectorizer -slp-vectorize-hor -slp-vectorize-hor-store -S < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=haswell | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128-ni:1"
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define void @test() #0 {
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; CHECK-LABEL: @test(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[DUMMY_PHI:%.*]] = phi i64 [ 1, [[ENTRY:%.*]] ], [ [[OP_EXTRA1:%.*]], [[LOOP]] ]
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; CHECK-NEXT: [[TMP0:%.*]] = phi i64 [ 2, [[ENTRY]] ], [ [[TMP3:%.*]], [[LOOP]] ]
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; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i64> poison, i64 [[TMP0]], i32 0
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; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <4 x i64> [[TMP1]], <4 x i64> poison, <4 x i32> zeroinitializer
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; CHECK-NEXT: [[TMP2:%.*]] = add <4 x i64> [[SHUFFLE]], <i64 3, i64 2, i64 1, i64 0>
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; CHECK-NEXT: [[TMP3]] = extractelement <4 x i64> [[TMP2]], i32 3
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; CHECK-NEXT: [[DUMMY_ADD:%.*]] = add i16 0, 0
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; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x i64> [[TMP2]], i32 0
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; CHECK-NEXT: [[DUMMY_SHL:%.*]] = shl i64 [[TMP4]], 32
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; CHECK-NEXT: [[TMP5:%.*]] = add <4 x i64> <i64 1, i64 1, i64 1, i64 1>, [[TMP2]]
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; CHECK-NEXT: [[TMP6:%.*]] = ashr exact <4 x i64> [[TMP5]], <i64 32, i64 32, i64 32, i64 32>
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; CHECK-NEXT: [[TMP7:%.*]] = call i64 @llvm.vector.reduce.add.v4i64(<4 x i64> [[TMP6]])
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; CHECK-NEXT: [[OP_EXTRA:%.*]] = add i64 [[TMP7]], 0
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; CHECK-NEXT: [[OP_EXTRA1]] = add i64 [[OP_EXTRA]], [[TMP3]]
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; CHECK-NEXT: br label [[LOOP]]
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;
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entry:
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br label %loop
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loop:
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%dummy_phi = phi i64 [ 1, %entry ], [ %last, %loop ]
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%0 = phi i64 [ 2, %entry ], [ %fork, %loop ]
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%inc1 = add i64 %0, 1
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%inc2 = add i64 %0, 2
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%inc11 = add i64 1, %inc1
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%exact1 = ashr exact i64 %inc11, 32
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%inc3 = add i64 %0, 3
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%dummy_add = add i16 0, 0
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%inc12 = add i64 1, %inc2
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%exact2 = ashr exact i64 %inc12, 32
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%dummy_shl = shl i64 %inc3, 32
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%inc13 = add i64 1, %inc3
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%exact3 = ashr exact i64 %inc13, 32
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%fork = add i64 %0, 0
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%sum1 = add i64 %exact3, %exact2
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%sum2 = add i64 %sum1, %exact1
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%zsum = add i64 %sum2, 0
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%sext22 = add i64 1, %fork
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%exact4 = ashr exact i64 %sext22, 32
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%join = add i64 %fork, %zsum
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%last = add i64 %join, %exact4
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br label %loop
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}
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