371fcb720e
That transformation is lossy, as discussed in https://github.com/llvm/llvm-project/issues/53853 and https://github.com/rust-lang/rust/issues/85133#issuecomment-904185574 This is an alternative to D119839, which would add a limited IPSCCP into SimplifyCFG. Unlike lowering switch to lookup, we still want this transformation to happen relatively early, but after giving a chance for the things like CVP to do their thing. It seems like deferring it just until the IPSCCP is enough for the tests at hand, but perhaps we need to be more aggressive and disable it until CVP. Fixes https://github.com/llvm/llvm-project/issues/53853 Refs. https://github.com/rust-lang/rust/issues/85133 Reviewed By: nikic Differential Revision: https://reviews.llvm.org/D119854
58 lines
1.1 KiB
LLVM
58 lines
1.1 KiB
LLVM
; RUN: opt -S -simplifycfg -simplifycfg-require-and-preserve-domtree=1 -switch-range-to-icmp < %s | FileCheck %s
|
|
|
|
define zeroext i1 @test1(i32 %x) nounwind readnone ssp noredzone {
|
|
entry:
|
|
switch i32 %x, label %lor.rhs [
|
|
i32 2, label %lor.end
|
|
i32 1, label %lor.end
|
|
i32 3, label %lor.end
|
|
]
|
|
|
|
lor.rhs:
|
|
br label %lor.end
|
|
|
|
lor.end:
|
|
%0 = phi i1 [ true, %entry ], [ false, %lor.rhs ], [ true, %entry ], [ true, %entry ]
|
|
ret i1 %0
|
|
|
|
; CHECK-LABEL: @test1(
|
|
; CHECK: %x.off = add i32 %x, -1
|
|
; CHECK: %switch = icmp ult i32 %x.off, 3
|
|
}
|
|
|
|
define zeroext i1 @test2(i32 %x) nounwind readnone ssp noredzone {
|
|
entry:
|
|
switch i32 %x, label %lor.rhs [
|
|
i32 0, label %lor.end
|
|
i32 1, label %lor.end
|
|
]
|
|
|
|
lor.rhs:
|
|
br label %lor.end
|
|
|
|
lor.end:
|
|
%0 = phi i1 [ true, %entry ], [ false, %lor.rhs ], [ true, %entry ]
|
|
ret i1 %0
|
|
|
|
; CHECK-LABEL: @test2(
|
|
; CHECK: %switch = icmp ult i32 %x, 2
|
|
}
|
|
|
|
define i32 @test3(i1 %flag) {
|
|
entry:
|
|
switch i1 %flag, label %bad [
|
|
i1 true, label %good
|
|
i1 false, label %good
|
|
]
|
|
|
|
good:
|
|
ret i32 0
|
|
|
|
bad:
|
|
ret i32 1
|
|
|
|
; CHECK-LABEL: @test3(
|
|
; CHECK: entry:
|
|
; CHECK-NEXT: ret i32 0
|
|
}
|