be8e2801a4
Move TransposeOp lowering in its own populate function as in some cases it is better to keep it during ContractOp lowering to better canonicalize it rather than emiting scalar insert/extract. Differential Revision: https://reviews.llvm.org/D101647
114 lines
4.5 KiB
C++
114 lines
4.5 KiB
C++
//===- VectorToLLVM.cpp - Conversion from Vector to the LLVM dialect ------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h"
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#include "../PassDetail.h"
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#include "mlir/Conversion/StandardToLLVM/ConvertStandardToLLVM.h"
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#include "mlir/Conversion/StandardToLLVM/ConvertStandardToLLVMPass.h"
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#include "mlir/Dialect/AMX/AMXDialect.h"
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#include "mlir/Dialect/AMX/Transforms.h"
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#include "mlir/Dialect/ArmNeon/ArmNeonDialect.h"
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#include "mlir/Dialect/ArmSVE/ArmSVEDialect.h"
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#include "mlir/Dialect/ArmSVE/Transforms.h"
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#include "mlir/Dialect/LLVMIR/LLVMDialect.h"
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#include "mlir/Dialect/MemRef/IR/MemRef.h"
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#include "mlir/Dialect/StandardOps/IR/Ops.h"
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#include "mlir/Dialect/Vector/VectorOps.h"
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#include "mlir/Dialect/X86Vector/Transforms.h"
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#include "mlir/Dialect/X86Vector/X86VectorDialect.h"
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#include "mlir/Transforms/GreedyPatternRewriteDriver.h"
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using namespace mlir;
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using namespace mlir::vector;
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namespace {
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struct LowerVectorToLLVMPass
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: public ConvertVectorToLLVMBase<LowerVectorToLLVMPass> {
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LowerVectorToLLVMPass(const LowerVectorToLLVMOptions &options) {
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this->reassociateFPReductions = options.reassociateFPReductions;
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this->enableIndexOptimizations = options.enableIndexOptimizations;
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this->enableArmNeon = options.enableArmNeon;
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this->enableArmSVE = options.enableArmSVE;
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this->enableAMX = options.enableAMX;
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this->enableX86Vector = options.enableX86Vector;
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}
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// Override explicitly to allow conditional dialect dependence.
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void getDependentDialects(DialectRegistry ®istry) const override {
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registry.insert<LLVM::LLVMDialect>();
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registry.insert<memref::MemRefDialect>();
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if (enableArmNeon)
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registry.insert<arm_neon::ArmNeonDialect>();
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if (enableArmSVE)
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registry.insert<arm_sve::ArmSVEDialect>();
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if (enableAMX)
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registry.insert<amx::AMXDialect>();
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if (enableX86Vector)
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registry.insert<x86vector::X86VectorDialect>();
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}
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void runOnOperation() override;
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};
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} // namespace
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void LowerVectorToLLVMPass::runOnOperation() {
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// Perform progressive lowering of operations on slices and
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// all contraction operations. Also applies folding and DCE.
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{
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RewritePatternSet patterns(&getContext());
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populateVectorToVectorCanonicalizationPatterns(patterns);
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populateVectorSlicesLoweringPatterns(patterns);
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populateVectorContractLoweringPatterns(patterns);
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populateVectorTransposeLoweringPatterns(patterns);
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(void)applyPatternsAndFoldGreedily(getOperation(), std::move(patterns));
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}
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// Convert to the LLVM IR dialect.
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LLVMTypeConverter converter(&getContext());
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RewritePatternSet patterns(&getContext());
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populateVectorMaskMaterializationPatterns(patterns, enableIndexOptimizations);
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populateVectorToLLVMMatrixConversionPatterns(converter, patterns);
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populateVectorToLLVMConversionPatterns(converter, patterns,
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reassociateFPReductions);
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populateVectorToLLVMMatrixConversionPatterns(converter, patterns);
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// Architecture specific augmentations.
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LLVMConversionTarget target(getContext());
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target.addLegalOp<LLVM::DialectCastOp>();
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target.addLegalDialect<memref::MemRefDialect>();
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target.addLegalDialect<StandardOpsDialect>();
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target.addLegalOp<UnrealizedConversionCastOp>();
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if (enableArmNeon) {
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// TODO: we may or may not want to include in-dialect lowering to
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// LLVM-compatible operations here. So far, all operations in the dialect
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// can be translated to LLVM IR so there is no conversion necessary.
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target.addLegalDialect<arm_neon::ArmNeonDialect>();
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}
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if (enableArmSVE) {
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configureArmSVELegalizeForExportTarget(target);
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populateArmSVELegalizeForLLVMExportPatterns(converter, patterns);
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}
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if (enableAMX) {
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configureAMXLegalizeForExportTarget(target);
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populateAMXLegalizeForLLVMExportPatterns(converter, patterns);
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}
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if (enableX86Vector) {
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configureX86VectorLegalizeForExportTarget(target);
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populateX86VectorLegalizeForLLVMExportPatterns(converter, patterns);
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}
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if (failed(
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applyPartialConversion(getOperation(), target, std::move(patterns))))
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signalPassFailure();
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}
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std::unique_ptr<OperationPass<ModuleOp>>
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mlir::createConvertVectorToLLVMPass(const LowerVectorToLLVMOptions &options) {
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return std::make_unique<LowerVectorToLLVMPass>(options);
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}
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