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chenglin.bi c8647738cd [InstCombine] Fold logic-and/logic-or by distributive laws

X && Z || Y && Z --> (X || Y) && Z
https://alive2.llvm.org/ce/z/nM6kZb

(X || Z) && (Y || Z) --> (X && Y) || Z
https://alive2.llvm.org/ce/z/_EWLRR

Fix: https://github.com/llvm/llvm-project/issues/53861

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D139408

2022-12-14 04:43:06 +08:00

AggressiveInstCombine

[AggressiveInstCombine] Handle the insert point of the merged load correctly.

2022-11-29 10:53:51 +00:00

CFGuard

[NFC] Cleanup: Remove Function::getBasicBlockList() when not required.

2022-12-13 11:46:29 -08:00

Coroutines

[Transforms/Coroutines] llvm::Optional => std::optional

2022-12-13 08:32:44 +00:00

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