bf4b7be68e
equality can be strict or loose and we want code to explicitly choose one or the other. Also renamed the Compare function to IsEqualTo, to avoid confusion. <rdar://problem/12856749> llvm-svn: 170152
884 lines
34 KiB
C++
884 lines
34 KiB
C++
//===-- ArchSpec.cpp --------------------------------------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "lldb/Core/ArchSpec.h"
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#include <stdio.h>
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#include <errno.h>
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#include <string>
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#include "llvm/Support/ELF.h"
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#include "llvm/Support/Host.h"
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#include "llvm/Support/MachO.h"
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#include "lldb/Core/RegularExpression.h"
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#include "lldb/Host/Endian.h"
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#include "lldb/Host/Host.h"
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#include "lldb/Target/Platform.h"
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using namespace lldb;
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using namespace lldb_private;
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#define ARCH_SPEC_SEPARATOR_CHAR '-'
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static bool cores_match (const ArchSpec::Core core1, const ArchSpec::Core core2, bool try_inverse, bool enforce_exact_match);
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namespace lldb_private {
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struct CoreDefinition
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{
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ByteOrder default_byte_order;
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uint32_t addr_byte_size;
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uint32_t min_opcode_byte_size;
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uint32_t max_opcode_byte_size;
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llvm::Triple::ArchType machine;
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ArchSpec::Core core;
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const char *name;
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};
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}
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// This core information can be looked using the ArchSpec::Core as the index
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static const CoreDefinition g_core_definitions[ArchSpec::kNumCores] =
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{
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{ eByteOrderLittle, 4, 2, 4, llvm::Triple::arm , ArchSpec::eCore_arm_generic , "arm" },
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{ eByteOrderLittle, 4, 2, 4, llvm::Triple::arm , ArchSpec::eCore_arm_armv4 , "armv4" },
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{ eByteOrderLittle, 4, 2, 4, llvm::Triple::arm , ArchSpec::eCore_arm_armv4t , "armv4t" },
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{ eByteOrderLittle, 4, 2, 4, llvm::Triple::arm , ArchSpec::eCore_arm_armv5 , "armv5" },
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{ eByteOrderLittle, 4, 2, 4, llvm::Triple::arm , ArchSpec::eCore_arm_armv5e , "armv5e" },
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{ eByteOrderLittle, 4, 2, 4, llvm::Triple::arm , ArchSpec::eCore_arm_armv5t , "armv5t" },
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{ eByteOrderLittle, 4, 2, 4, llvm::Triple::arm , ArchSpec::eCore_arm_armv6 , "armv6" },
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{ eByteOrderLittle, 4, 2, 4, llvm::Triple::arm , ArchSpec::eCore_arm_armv7 , "armv7" },
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{ eByteOrderLittle, 4, 2, 4, llvm::Triple::arm , ArchSpec::eCore_arm_armv7f , "armv7f" },
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{ eByteOrderLittle, 4, 2, 4, llvm::Triple::arm , ArchSpec::eCore_arm_armv7k , "armv7k" },
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{ eByteOrderLittle, 4, 2, 4, llvm::Triple::arm , ArchSpec::eCore_arm_armv7s , "armv7s" },
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{ eByteOrderLittle, 4, 2, 4, llvm::Triple::arm , ArchSpec::eCore_arm_xscale , "xscale" },
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{ eByteOrderLittle, 4, 2, 4, llvm::Triple::thumb , ArchSpec::eCore_thumb , "thumb" },
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{ eByteOrderLittle, 4, 2, 4, llvm::Triple::thumb , ArchSpec::eCore_thumbv4t , "thumbv4t" },
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{ eByteOrderLittle, 4, 2, 4, llvm::Triple::thumb , ArchSpec::eCore_thumbv5 , "thumbv5" },
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{ eByteOrderLittle, 4, 2, 4, llvm::Triple::thumb , ArchSpec::eCore_thumbv5e , "thumbv5e" },
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{ eByteOrderLittle, 4, 2, 4, llvm::Triple::thumb , ArchSpec::eCore_thumbv6 , "thumbv6" },
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{ eByteOrderLittle, 4, 2, 4, llvm::Triple::thumb , ArchSpec::eCore_thumbv7 , "thumbv7" },
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{ eByteOrderLittle, 4, 2, 4, llvm::Triple::thumb , ArchSpec::eCore_thumbv7f , "thumbv7f" },
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{ eByteOrderLittle, 4, 2, 4, llvm::Triple::thumb , ArchSpec::eCore_thumbv7k , "thumbv7k" },
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{ eByteOrderLittle, 4, 2, 4, llvm::Triple::thumb , ArchSpec::eCore_thumbv7s , "thumbv7s" },
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{ eByteOrderLittle, 4, 4, 4, llvm::Triple::ppc , ArchSpec::eCore_ppc_generic , "ppc" },
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{ eByteOrderLittle, 4, 4, 4, llvm::Triple::ppc , ArchSpec::eCore_ppc_ppc601 , "ppc601" },
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{ eByteOrderLittle, 4, 4, 4, llvm::Triple::ppc , ArchSpec::eCore_ppc_ppc602 , "ppc602" },
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{ eByteOrderLittle, 4, 4, 4, llvm::Triple::ppc , ArchSpec::eCore_ppc_ppc603 , "ppc603" },
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{ eByteOrderLittle, 4, 4, 4, llvm::Triple::ppc , ArchSpec::eCore_ppc_ppc603e , "ppc603e" },
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{ eByteOrderLittle, 4, 4, 4, llvm::Triple::ppc , ArchSpec::eCore_ppc_ppc603ev , "ppc603ev" },
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{ eByteOrderLittle, 4, 4, 4, llvm::Triple::ppc , ArchSpec::eCore_ppc_ppc604 , "ppc604" },
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{ eByteOrderLittle, 4, 4, 4, llvm::Triple::ppc , ArchSpec::eCore_ppc_ppc604e , "ppc604e" },
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{ eByteOrderLittle, 4, 4, 4, llvm::Triple::ppc , ArchSpec::eCore_ppc_ppc620 , "ppc620" },
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{ eByteOrderLittle, 4, 4, 4, llvm::Triple::ppc , ArchSpec::eCore_ppc_ppc750 , "ppc750" },
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{ eByteOrderLittle, 4, 4, 4, llvm::Triple::ppc , ArchSpec::eCore_ppc_ppc7400 , "ppc7400" },
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{ eByteOrderLittle, 4, 4, 4, llvm::Triple::ppc , ArchSpec::eCore_ppc_ppc7450 , "ppc7450" },
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{ eByteOrderLittle, 4, 4, 4, llvm::Triple::ppc , ArchSpec::eCore_ppc_ppc970 , "ppc970" },
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{ eByteOrderLittle, 8, 4, 4, llvm::Triple::ppc64 , ArchSpec::eCore_ppc64_generic , "ppc64" },
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{ eByteOrderLittle, 8, 4, 4, llvm::Triple::ppc64 , ArchSpec::eCore_ppc64_ppc970_64 , "ppc970-64" },
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{ eByteOrderLittle, 4, 4, 4, llvm::Triple::sparc , ArchSpec::eCore_sparc_generic , "sparc" },
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{ eByteOrderLittle, 8, 4, 4, llvm::Triple::sparcv9, ArchSpec::eCore_sparc9_generic , "sparcv9" },
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{ eByteOrderLittle, 4, 1, 15, llvm::Triple::x86 , ArchSpec::eCore_x86_32_i386 , "i386" },
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{ eByteOrderLittle, 4, 1, 15, llvm::Triple::x86 , ArchSpec::eCore_x86_32_i486 , "i486" },
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{ eByteOrderLittle, 4, 1, 15, llvm::Triple::x86 , ArchSpec::eCore_x86_32_i486sx , "i486sx" },
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{ eByteOrderLittle, 8, 1, 15, llvm::Triple::x86_64 , ArchSpec::eCore_x86_64_x86_64 , "x86_64" },
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{ eByteOrderLittle, 4, 4, 4 , llvm::Triple::UnknownArch , ArchSpec::eCore_uknownMach32 , "unknown-mach-32" },
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{ eByteOrderLittle, 8, 4, 4 , llvm::Triple::UnknownArch , ArchSpec::eCore_uknownMach64 , "unknown-mach-64" }
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};
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struct ArchDefinitionEntry
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{
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ArchSpec::Core core;
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uint32_t cpu;
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uint32_t sub;
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uint32_t cpu_mask;
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uint32_t sub_mask;
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};
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struct ArchDefinition
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{
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ArchitectureType type;
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size_t num_entries;
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const ArchDefinitionEntry *entries;
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const char *name;
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};
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uint32_t
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ArchSpec::AutoComplete (const char *name, StringList &matches)
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{
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uint32_t i;
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if (name && name[0])
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{
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for (i = 0; i < ArchSpec::kNumCores; ++i)
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{
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if (NameMatches(g_core_definitions[i].name, eNameMatchStartsWith, name))
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matches.AppendString (g_core_definitions[i].name);
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}
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}
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else
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{
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for (i = 0; i < ArchSpec::kNumCores; ++i)
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matches.AppendString (g_core_definitions[i].name);
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}
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return matches.GetSize();
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}
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#define CPU_ANY (UINT32_MAX)
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//===----------------------------------------------------------------------===//
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// A table that gets searched linearly for matches. This table is used to
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// convert cpu type and subtypes to architecture names, and to convert
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// architecture names to cpu types and subtypes. The ordering is important and
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// allows the precedence to be set when the table is built.
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#define SUBTYPE_MASK 0x00FFFFFFu
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static const ArchDefinitionEntry g_macho_arch_entries[] =
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{
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{ ArchSpec::eCore_arm_generic , llvm::MachO::CPUTypeARM , CPU_ANY, UINT32_MAX , UINT32_MAX },
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{ ArchSpec::eCore_arm_generic , llvm::MachO::CPUTypeARM , 0 , UINT32_MAX , SUBTYPE_MASK },
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{ ArchSpec::eCore_arm_armv4 , llvm::MachO::CPUTypeARM , 5 , UINT32_MAX , SUBTYPE_MASK },
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{ ArchSpec::eCore_arm_armv4t , llvm::MachO::CPUTypeARM , 5 , UINT32_MAX , SUBTYPE_MASK },
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{ ArchSpec::eCore_arm_armv6 , llvm::MachO::CPUTypeARM , 6 , UINT32_MAX , SUBTYPE_MASK },
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{ ArchSpec::eCore_arm_armv5 , llvm::MachO::CPUTypeARM , 7 , UINT32_MAX , SUBTYPE_MASK },
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{ ArchSpec::eCore_arm_armv5e , llvm::MachO::CPUTypeARM , 7 , UINT32_MAX , SUBTYPE_MASK },
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{ ArchSpec::eCore_arm_armv5t , llvm::MachO::CPUTypeARM , 7 , UINT32_MAX , SUBTYPE_MASK },
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{ ArchSpec::eCore_arm_xscale , llvm::MachO::CPUTypeARM , 8 , UINT32_MAX , SUBTYPE_MASK },
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{ ArchSpec::eCore_arm_armv7 , llvm::MachO::CPUTypeARM , 9 , UINT32_MAX , SUBTYPE_MASK },
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{ ArchSpec::eCore_arm_armv7f , llvm::MachO::CPUTypeARM , 10 , UINT32_MAX , SUBTYPE_MASK },
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{ ArchSpec::eCore_arm_armv7k , llvm::MachO::CPUTypeARM , 12 , UINT32_MAX , SUBTYPE_MASK },
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{ ArchSpec::eCore_arm_armv7s , llvm::MachO::CPUTypeARM , 11 , UINT32_MAX , SUBTYPE_MASK },
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{ ArchSpec::eCore_thumb , llvm::MachO::CPUTypeARM , 0 , UINT32_MAX , SUBTYPE_MASK },
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{ ArchSpec::eCore_thumbv4t , llvm::MachO::CPUTypeARM , 5 , UINT32_MAX , SUBTYPE_MASK },
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{ ArchSpec::eCore_thumbv5 , llvm::MachO::CPUTypeARM , 7 , UINT32_MAX , SUBTYPE_MASK },
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{ ArchSpec::eCore_thumbv5e , llvm::MachO::CPUTypeARM , 7 , UINT32_MAX , SUBTYPE_MASK },
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{ ArchSpec::eCore_thumbv6 , llvm::MachO::CPUTypeARM , 6 , UINT32_MAX , SUBTYPE_MASK },
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{ ArchSpec::eCore_thumbv7 , llvm::MachO::CPUTypeARM , 9 , UINT32_MAX , SUBTYPE_MASK },
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{ ArchSpec::eCore_thumbv7f , llvm::MachO::CPUTypeARM , 10 , UINT32_MAX , SUBTYPE_MASK },
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{ ArchSpec::eCore_thumbv7k , llvm::MachO::CPUTypeARM , 12 , UINT32_MAX , SUBTYPE_MASK },
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{ ArchSpec::eCore_thumbv7s , llvm::MachO::CPUTypeARM , 11 , UINT32_MAX , SUBTYPE_MASK },
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{ ArchSpec::eCore_ppc_generic , llvm::MachO::CPUTypePowerPC , CPU_ANY, UINT32_MAX , UINT32_MAX },
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{ ArchSpec::eCore_ppc_generic , llvm::MachO::CPUTypePowerPC , 0 , UINT32_MAX , SUBTYPE_MASK },
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{ ArchSpec::eCore_ppc_ppc601 , llvm::MachO::CPUTypePowerPC , 1 , UINT32_MAX , SUBTYPE_MASK },
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{ ArchSpec::eCore_ppc_ppc602 , llvm::MachO::CPUTypePowerPC , 2 , UINT32_MAX , SUBTYPE_MASK },
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{ ArchSpec::eCore_ppc_ppc603 , llvm::MachO::CPUTypePowerPC , 3 , UINT32_MAX , SUBTYPE_MASK },
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{ ArchSpec::eCore_ppc_ppc603e , llvm::MachO::CPUTypePowerPC , 4 , UINT32_MAX , SUBTYPE_MASK },
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{ ArchSpec::eCore_ppc_ppc603ev , llvm::MachO::CPUTypePowerPC , 5 , UINT32_MAX , SUBTYPE_MASK },
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{ ArchSpec::eCore_ppc_ppc604 , llvm::MachO::CPUTypePowerPC , 6 , UINT32_MAX , SUBTYPE_MASK },
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{ ArchSpec::eCore_ppc_ppc604e , llvm::MachO::CPUTypePowerPC , 7 , UINT32_MAX , SUBTYPE_MASK },
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{ ArchSpec::eCore_ppc_ppc620 , llvm::MachO::CPUTypePowerPC , 8 , UINT32_MAX , SUBTYPE_MASK },
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{ ArchSpec::eCore_ppc_ppc750 , llvm::MachO::CPUTypePowerPC , 9 , UINT32_MAX , SUBTYPE_MASK },
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{ ArchSpec::eCore_ppc_ppc7400 , llvm::MachO::CPUTypePowerPC , 10 , UINT32_MAX , SUBTYPE_MASK },
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{ ArchSpec::eCore_ppc_ppc7450 , llvm::MachO::CPUTypePowerPC , 11 , UINT32_MAX , SUBTYPE_MASK },
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{ ArchSpec::eCore_ppc_ppc970 , llvm::MachO::CPUTypePowerPC , 100 , UINT32_MAX , SUBTYPE_MASK },
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{ ArchSpec::eCore_ppc64_generic , llvm::MachO::CPUTypePowerPC64 , 0 , UINT32_MAX , SUBTYPE_MASK },
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{ ArchSpec::eCore_ppc64_ppc970_64 , llvm::MachO::CPUTypePowerPC64 , 100 , UINT32_MAX , SUBTYPE_MASK },
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{ ArchSpec::eCore_x86_32_i386 , llvm::MachO::CPUTypeI386 , 3 , UINT32_MAX , SUBTYPE_MASK },
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{ ArchSpec::eCore_x86_32_i486 , llvm::MachO::CPUTypeI386 , 4 , UINT32_MAX , SUBTYPE_MASK },
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{ ArchSpec::eCore_x86_32_i486sx , llvm::MachO::CPUTypeI386 , 0x84 , UINT32_MAX , SUBTYPE_MASK },
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{ ArchSpec::eCore_x86_32_i386 , llvm::MachO::CPUTypeI386 , CPU_ANY, UINT32_MAX , UINT32_MAX },
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{ ArchSpec::eCore_x86_64_x86_64 , llvm::MachO::CPUTypeX86_64 , 3 , UINT32_MAX , SUBTYPE_MASK },
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{ ArchSpec::eCore_x86_64_x86_64 , llvm::MachO::CPUTypeX86_64 , 4 , UINT32_MAX , SUBTYPE_MASK },
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{ ArchSpec::eCore_x86_64_x86_64 , llvm::MachO::CPUTypeX86_64 , CPU_ANY, UINT32_MAX , UINT32_MAX },
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// Catch any unknown mach architectures so we can always use the object and symbol mach-o files
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{ ArchSpec::eCore_uknownMach32 , 0 , 0 , 0xFF000000u, 0x00000000u },
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{ ArchSpec::eCore_uknownMach64 , llvm::MachO::CPUArchABI64 , 0 , 0xFF000000u, 0x00000000u }
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};
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static const ArchDefinition g_macho_arch_def = {
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eArchTypeMachO,
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sizeof(g_macho_arch_entries)/sizeof(g_macho_arch_entries[0]),
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g_macho_arch_entries,
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"mach-o"
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};
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//===----------------------------------------------------------------------===//
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// A table that gets searched linearly for matches. This table is used to
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// convert cpu type and subtypes to architecture names, and to convert
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// architecture names to cpu types and subtypes. The ordering is important and
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// allows the precedence to be set when the table is built.
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static const ArchDefinitionEntry g_elf_arch_entries[] =
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{
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{ ArchSpec::eCore_sparc_generic , llvm::ELF::EM_SPARC , LLDB_INVALID_CPUTYPE, 0xFFFFFFFFu, 0xFFFFFFFFu }, // Sparc
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{ ArchSpec::eCore_x86_32_i386 , llvm::ELF::EM_386 , LLDB_INVALID_CPUTYPE, 0xFFFFFFFFu, 0xFFFFFFFFu }, // Intel 80386
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{ ArchSpec::eCore_x86_32_i486 , llvm::ELF::EM_486 , LLDB_INVALID_CPUTYPE, 0xFFFFFFFFu, 0xFFFFFFFFu }, // Intel 486 (deprecated)
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{ ArchSpec::eCore_ppc_generic , llvm::ELF::EM_PPC , LLDB_INVALID_CPUTYPE, 0xFFFFFFFFu, 0xFFFFFFFFu }, // PowerPC
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{ ArchSpec::eCore_ppc64_generic , llvm::ELF::EM_PPC64 , LLDB_INVALID_CPUTYPE, 0xFFFFFFFFu, 0xFFFFFFFFu }, // PowerPC64
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{ ArchSpec::eCore_arm_generic , llvm::ELF::EM_ARM , LLDB_INVALID_CPUTYPE, 0xFFFFFFFFu, 0xFFFFFFFFu }, // ARM
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{ ArchSpec::eCore_sparc9_generic , llvm::ELF::EM_SPARCV9, LLDB_INVALID_CPUTYPE, 0xFFFFFFFFu, 0xFFFFFFFFu }, // SPARC V9
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{ ArchSpec::eCore_x86_64_x86_64 , llvm::ELF::EM_X86_64 , LLDB_INVALID_CPUTYPE, 0xFFFFFFFFu, 0xFFFFFFFFu } // AMD64
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};
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static const ArchDefinition g_elf_arch_def = {
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eArchTypeELF,
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sizeof(g_elf_arch_entries)/sizeof(g_elf_arch_entries[0]),
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g_elf_arch_entries,
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"elf",
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};
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//===----------------------------------------------------------------------===//
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// Table of all ArchDefinitions
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static const ArchDefinition *g_arch_definitions[] = {
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&g_macho_arch_def,
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&g_elf_arch_def
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};
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static const size_t k_num_arch_definitions =
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sizeof(g_arch_definitions) / sizeof(g_arch_definitions[0]);
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//===----------------------------------------------------------------------===//
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// Static helper functions.
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// Get the architecture definition for a given object type.
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static const ArchDefinition *
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FindArchDefinition (ArchitectureType arch_type)
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{
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for (unsigned int i = 0; i < k_num_arch_definitions; ++i)
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{
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const ArchDefinition *def = g_arch_definitions[i];
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if (def->type == arch_type)
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return def;
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}
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return NULL;
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}
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// Get an architecture definition by name.
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static const CoreDefinition *
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FindCoreDefinition (llvm::StringRef name)
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{
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for (unsigned int i = 0; i < ArchSpec::kNumCores; ++i)
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{
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if (name.equals_lower(g_core_definitions[i].name))
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return &g_core_definitions[i];
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}
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return NULL;
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}
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static inline const CoreDefinition *
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FindCoreDefinition (ArchSpec::Core core)
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{
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if (core >= 0 && core < ArchSpec::kNumCores)
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return &g_core_definitions[core];
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return NULL;
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}
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// Get a definition entry by cpu type and subtype.
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static const ArchDefinitionEntry *
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FindArchDefinitionEntry (const ArchDefinition *def, uint32_t cpu, uint32_t sub)
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{
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if (def == NULL)
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return NULL;
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const ArchDefinitionEntry *entries = def->entries;
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for (size_t i = 0; i < def->num_entries; ++i)
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{
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if (entries[i].cpu == (cpu & entries[i].cpu_mask))
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if (entries[i].sub == (sub & entries[i].sub_mask))
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return &entries[i];
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}
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return NULL;
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}
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static const ArchDefinitionEntry *
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FindArchDefinitionEntry (const ArchDefinition *def, ArchSpec::Core core)
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{
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if (def == NULL)
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return NULL;
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const ArchDefinitionEntry *entries = def->entries;
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for (size_t i = 0; i < def->num_entries; ++i)
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{
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if (entries[i].core == core)
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return &entries[i];
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}
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return NULL;
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}
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//===----------------------------------------------------------------------===//
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// Constructors and destructors.
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ArchSpec::ArchSpec() :
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m_triple (),
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m_core (kCore_invalid),
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m_byte_order (eByteOrderInvalid)
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{
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}
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ArchSpec::ArchSpec (const char *triple_cstr, Platform *platform) :
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m_triple (),
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m_core (kCore_invalid),
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m_byte_order (eByteOrderInvalid)
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{
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if (triple_cstr)
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SetTriple(triple_cstr, platform);
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}
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ArchSpec::ArchSpec (const char *triple_cstr) :
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m_triple (),
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m_core (kCore_invalid),
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m_byte_order (eByteOrderInvalid)
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{
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if (triple_cstr)
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SetTriple(triple_cstr);
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}
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ArchSpec::ArchSpec(const llvm::Triple &triple) :
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m_triple (),
|
|
m_core (kCore_invalid),
|
|
m_byte_order (eByteOrderInvalid)
|
|
{
|
|
SetTriple(triple);
|
|
}
|
|
|
|
ArchSpec::ArchSpec (ArchitectureType arch_type, uint32_t cpu, uint32_t subtype) :
|
|
m_triple (),
|
|
m_core (kCore_invalid),
|
|
m_byte_order (eByteOrderInvalid)
|
|
{
|
|
SetArchitecture (arch_type, cpu, subtype);
|
|
}
|
|
|
|
ArchSpec::~ArchSpec()
|
|
{
|
|
}
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
// Assignment and initialization.
|
|
|
|
const ArchSpec&
|
|
ArchSpec::operator= (const ArchSpec& rhs)
|
|
{
|
|
if (this != &rhs)
|
|
{
|
|
m_triple = rhs.m_triple;
|
|
m_core = rhs.m_core;
|
|
m_byte_order = rhs.m_byte_order;
|
|
}
|
|
return *this;
|
|
}
|
|
|
|
void
|
|
ArchSpec::Clear()
|
|
{
|
|
m_triple = llvm::Triple();
|
|
m_core = kCore_invalid;
|
|
m_byte_order = eByteOrderInvalid;
|
|
}
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
// Predicates.
|
|
|
|
|
|
const char *
|
|
ArchSpec::GetArchitectureName () const
|
|
{
|
|
const CoreDefinition *core_def = FindCoreDefinition (m_core);
|
|
if (core_def)
|
|
return core_def->name;
|
|
return "unknown";
|
|
}
|
|
|
|
uint32_t
|
|
ArchSpec::GetMachOCPUType () const
|
|
{
|
|
const CoreDefinition *core_def = FindCoreDefinition (m_core);
|
|
if (core_def)
|
|
{
|
|
const ArchDefinitionEntry *arch_def = FindArchDefinitionEntry (&g_macho_arch_def, core_def->core);
|
|
if (arch_def)
|
|
{
|
|
return arch_def->cpu;
|
|
}
|
|
}
|
|
return LLDB_INVALID_CPUTYPE;
|
|
}
|
|
|
|
uint32_t
|
|
ArchSpec::GetMachOCPUSubType () const
|
|
{
|
|
const CoreDefinition *core_def = FindCoreDefinition (m_core);
|
|
if (core_def)
|
|
{
|
|
const ArchDefinitionEntry *arch_def = FindArchDefinitionEntry (&g_macho_arch_def, core_def->core);
|
|
if (arch_def)
|
|
{
|
|
return arch_def->sub;
|
|
}
|
|
}
|
|
return LLDB_INVALID_CPUTYPE;
|
|
}
|
|
|
|
llvm::Triple::ArchType
|
|
ArchSpec::GetMachine () const
|
|
{
|
|
const CoreDefinition *core_def = FindCoreDefinition (m_core);
|
|
if (core_def)
|
|
return core_def->machine;
|
|
|
|
return llvm::Triple::UnknownArch;
|
|
}
|
|
|
|
uint32_t
|
|
ArchSpec::GetAddressByteSize() const
|
|
{
|
|
const CoreDefinition *core_def = FindCoreDefinition (m_core);
|
|
if (core_def)
|
|
return core_def->addr_byte_size;
|
|
return 0;
|
|
}
|
|
|
|
ByteOrder
|
|
ArchSpec::GetDefaultEndian () const
|
|
{
|
|
const CoreDefinition *core_def = FindCoreDefinition (m_core);
|
|
if (core_def)
|
|
return core_def->default_byte_order;
|
|
return eByteOrderInvalid;
|
|
}
|
|
|
|
lldb::ByteOrder
|
|
ArchSpec::GetByteOrder () const
|
|
{
|
|
if (m_byte_order == eByteOrderInvalid)
|
|
return GetDefaultEndian();
|
|
return m_byte_order;
|
|
}
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
// Mutators.
|
|
|
|
bool
|
|
ArchSpec::SetTriple (const llvm::Triple &triple)
|
|
{
|
|
m_triple = triple;
|
|
|
|
llvm::StringRef arch_name (m_triple.getArchName());
|
|
const CoreDefinition *core_def = FindCoreDefinition (arch_name);
|
|
if (core_def)
|
|
{
|
|
m_core = core_def->core;
|
|
// Set the byte order to the default byte order for an architecture.
|
|
// This can be modified if needed for cases when cores handle both
|
|
// big and little endian
|
|
m_byte_order = core_def->default_byte_order;
|
|
}
|
|
else
|
|
{
|
|
Clear();
|
|
}
|
|
|
|
|
|
return IsValid();
|
|
}
|
|
|
|
static bool
|
|
ParseMachCPUDashSubtypeTriple (const char *triple_cstr, ArchSpec &arch)
|
|
{
|
|
// Accept "12-10" or "12.10" as cpu type/subtype
|
|
if (isdigit(triple_cstr[0]))
|
|
{
|
|
char *end = NULL;
|
|
errno = 0;
|
|
uint32_t cpu = ::strtoul (triple_cstr, &end, 0);
|
|
if (errno == 0 && cpu != 0 && end && ((*end == '-') || (*end == '.')))
|
|
{
|
|
errno = 0;
|
|
uint32_t sub = ::strtoul (end + 1, &end, 0);
|
|
if (errno == 0 && end && ((*end == '-') || (*end == '.') || (*end == '\0')))
|
|
{
|
|
if (arch.SetArchitecture (eArchTypeMachO, cpu, sub))
|
|
{
|
|
if (*end == '-')
|
|
{
|
|
llvm::StringRef vendor_os (end + 1);
|
|
size_t dash_pos = vendor_os.find('-');
|
|
if (dash_pos != llvm::StringRef::npos)
|
|
{
|
|
llvm::StringRef vendor_str(vendor_os.substr(0, dash_pos));
|
|
arch.GetTriple().setVendorName(vendor_str);
|
|
const size_t vendor_start_pos = dash_pos+1;
|
|
dash_pos = vendor_os.find(vendor_start_pos, '-');
|
|
if (dash_pos == llvm::StringRef::npos)
|
|
{
|
|
if (vendor_start_pos < vendor_os.size())
|
|
arch.GetTriple().setOSName(vendor_os.substr(vendor_start_pos));
|
|
}
|
|
else
|
|
{
|
|
arch.GetTriple().setOSName(vendor_os.substr(vendor_start_pos, dash_pos - vendor_start_pos));
|
|
}
|
|
}
|
|
}
|
|
return true;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
return false;
|
|
}
|
|
bool
|
|
ArchSpec::SetTriple (const char *triple_cstr)
|
|
{
|
|
if (triple_cstr && triple_cstr[0])
|
|
{
|
|
if (ParseMachCPUDashSubtypeTriple (triple_cstr, *this))
|
|
return true;
|
|
|
|
llvm::StringRef triple_stref (triple_cstr);
|
|
if (triple_stref.startswith (LLDB_ARCH_DEFAULT))
|
|
{
|
|
// Special case for the current host default architectures...
|
|
if (triple_stref.equals (LLDB_ARCH_DEFAULT_32BIT))
|
|
*this = Host::GetArchitecture (Host::eSystemDefaultArchitecture32);
|
|
else if (triple_stref.equals (LLDB_ARCH_DEFAULT_64BIT))
|
|
*this = Host::GetArchitecture (Host::eSystemDefaultArchitecture64);
|
|
else if (triple_stref.equals (LLDB_ARCH_DEFAULT))
|
|
*this = Host::GetArchitecture (Host::eSystemDefaultArchitecture);
|
|
}
|
|
else
|
|
{
|
|
std::string normalized_triple_sstr (llvm::Triple::normalize(triple_stref));
|
|
triple_stref = normalized_triple_sstr;
|
|
SetTriple (llvm::Triple (triple_stref));
|
|
}
|
|
}
|
|
else
|
|
Clear();
|
|
return IsValid();
|
|
}
|
|
|
|
bool
|
|
ArchSpec::SetTriple (const char *triple_cstr, Platform *platform)
|
|
{
|
|
if (triple_cstr && triple_cstr[0])
|
|
{
|
|
if (ParseMachCPUDashSubtypeTriple (triple_cstr, *this))
|
|
return true;
|
|
|
|
llvm::StringRef triple_stref (triple_cstr);
|
|
if (triple_stref.startswith (LLDB_ARCH_DEFAULT))
|
|
{
|
|
// Special case for the current host default architectures...
|
|
if (triple_stref.equals (LLDB_ARCH_DEFAULT_32BIT))
|
|
*this = Host::GetArchitecture (Host::eSystemDefaultArchitecture32);
|
|
else if (triple_stref.equals (LLDB_ARCH_DEFAULT_64BIT))
|
|
*this = Host::GetArchitecture (Host::eSystemDefaultArchitecture64);
|
|
else if (triple_stref.equals (LLDB_ARCH_DEFAULT))
|
|
*this = Host::GetArchitecture (Host::eSystemDefaultArchitecture);
|
|
}
|
|
else
|
|
{
|
|
ArchSpec raw_arch (triple_cstr);
|
|
|
|
std::string normalized_triple_sstr (llvm::Triple::normalize(triple_stref));
|
|
triple_stref = normalized_triple_sstr;
|
|
llvm::Triple normalized_triple (triple_stref);
|
|
|
|
const bool os_specified = normalized_triple.getOSName().size() > 0;
|
|
const bool vendor_specified = normalized_triple.getVendorName().size() > 0;
|
|
const bool env_specified = normalized_triple.getEnvironmentName().size() > 0;
|
|
|
|
// If we got an arch only, then default the vendor, os, environment
|
|
// to match the platform if one is supplied
|
|
if (!(os_specified || vendor_specified || env_specified))
|
|
{
|
|
if (platform)
|
|
{
|
|
// If we were given a platform, use the platform's system
|
|
// architecture. If this is not available (might not be
|
|
// connected) use the first supported architecture.
|
|
ArchSpec compatible_arch;
|
|
if (platform->IsCompatibleArchitecture (raw_arch, &compatible_arch))
|
|
{
|
|
if (compatible_arch.IsValid())
|
|
{
|
|
const llvm::Triple &compatible_triple = compatible_arch.GetTriple();
|
|
if (!vendor_specified)
|
|
normalized_triple.setVendor(compatible_triple.getVendor());
|
|
if (!os_specified)
|
|
normalized_triple.setOS(compatible_triple.getOS());
|
|
if (!env_specified && compatible_triple.getEnvironmentName().size())
|
|
normalized_triple.setEnvironment(compatible_triple.getEnvironment());
|
|
}
|
|
}
|
|
else
|
|
{
|
|
*this = raw_arch;
|
|
return IsValid();
|
|
}
|
|
}
|
|
else
|
|
{
|
|
// No platform specified, fall back to the host system for
|
|
// the default vendor, os, and environment.
|
|
llvm::Triple host_triple(llvm::sys::getDefaultTargetTriple());
|
|
if (!vendor_specified)
|
|
normalized_triple.setVendor(host_triple.getVendor());
|
|
if (!vendor_specified)
|
|
normalized_triple.setOS(host_triple.getOS());
|
|
if (!env_specified && host_triple.getEnvironmentName().size())
|
|
normalized_triple.setEnvironment(host_triple.getEnvironment());
|
|
}
|
|
}
|
|
SetTriple (normalized_triple);
|
|
}
|
|
}
|
|
else
|
|
Clear();
|
|
return IsValid();
|
|
}
|
|
|
|
bool
|
|
ArchSpec::SetArchitecture (ArchitectureType arch_type, uint32_t cpu, uint32_t sub)
|
|
{
|
|
m_core = kCore_invalid;
|
|
bool update_triple = true;
|
|
const ArchDefinition *arch_def = FindArchDefinition(arch_type);
|
|
if (arch_def)
|
|
{
|
|
const ArchDefinitionEntry *arch_def_entry = FindArchDefinitionEntry (arch_def, cpu, sub);
|
|
if (arch_def_entry)
|
|
{
|
|
const CoreDefinition *core_def = FindCoreDefinition (arch_def_entry->core);
|
|
if (core_def)
|
|
{
|
|
m_core = core_def->core;
|
|
update_triple = false;
|
|
// Always use the architecture name because it might be more descriptive
|
|
// than the architecture enum ("armv7" -> llvm::Triple::arm).
|
|
m_triple.setArchName(llvm::StringRef(core_def->name));
|
|
if (arch_type == eArchTypeMachO)
|
|
{
|
|
m_triple.setVendor (llvm::Triple::Apple);
|
|
|
|
switch (core_def->machine)
|
|
{
|
|
case llvm::Triple::arm:
|
|
case llvm::Triple::thumb:
|
|
m_triple.setOS (llvm::Triple::IOS);
|
|
break;
|
|
|
|
case llvm::Triple::x86:
|
|
case llvm::Triple::x86_64:
|
|
default:
|
|
m_triple.setOS (llvm::Triple::MacOSX);
|
|
break;
|
|
}
|
|
}
|
|
else
|
|
{
|
|
m_triple.setVendor (llvm::Triple::UnknownVendor);
|
|
m_triple.setOS (llvm::Triple::UnknownOS);
|
|
}
|
|
// Fall back onto setting the machine type if the arch by name failed...
|
|
if (m_triple.getArch () == llvm::Triple::UnknownArch)
|
|
m_triple.setArch (core_def->machine);
|
|
}
|
|
}
|
|
}
|
|
CoreUpdated(update_triple);
|
|
return IsValid();
|
|
}
|
|
|
|
uint32_t
|
|
ArchSpec::GetMinimumOpcodeByteSize() const
|
|
{
|
|
const CoreDefinition *core_def = FindCoreDefinition (m_core);
|
|
if (core_def)
|
|
return core_def->min_opcode_byte_size;
|
|
return 0;
|
|
}
|
|
|
|
uint32_t
|
|
ArchSpec::GetMaximumOpcodeByteSize() const
|
|
{
|
|
const CoreDefinition *core_def = FindCoreDefinition (m_core);
|
|
if (core_def)
|
|
return core_def->max_opcode_byte_size;
|
|
return 0;
|
|
}
|
|
|
|
bool
|
|
ArchSpec::IsExactMatch (const ArchSpec& rhs) const
|
|
{
|
|
return IsEqualTo (rhs, true);
|
|
}
|
|
|
|
bool
|
|
ArchSpec::IsCompatibleMatch (const ArchSpec& rhs) const
|
|
{
|
|
return IsEqualTo (rhs, false);
|
|
}
|
|
|
|
bool
|
|
ArchSpec::IsEqualTo (const ArchSpec& rhs, bool exact_match) const
|
|
{
|
|
if (GetByteOrder() != rhs.GetByteOrder())
|
|
return false;
|
|
|
|
const ArchSpec::Core lhs_core = GetCore ();
|
|
const ArchSpec::Core rhs_core = rhs.GetCore ();
|
|
|
|
const bool core_match = cores_match (lhs_core, rhs_core, true, exact_match);
|
|
|
|
if (core_match)
|
|
{
|
|
const llvm::Triple &lhs_triple = GetTriple();
|
|
const llvm::Triple &rhs_triple = rhs.GetTriple();
|
|
|
|
const llvm::Triple::VendorType lhs_triple_vendor = lhs_triple.getVendor();
|
|
const llvm::Triple::VendorType rhs_triple_vendor = rhs_triple.getVendor();
|
|
if (lhs_triple_vendor != rhs_triple_vendor)
|
|
{
|
|
if (exact_match)
|
|
{
|
|
const bool rhs_vendor_specified = rhs.TripleVendorWasSpecified();
|
|
const bool lhs_vendor_specified = TripleVendorWasSpecified();
|
|
// Both architectures had the vendor specified, so if they aren't
|
|
// equal then we return false
|
|
if (rhs_vendor_specified && lhs_vendor_specified)
|
|
return false;
|
|
}
|
|
|
|
// Only fail if both vendor types are not unknown
|
|
if (lhs_triple_vendor != llvm::Triple::UnknownVendor &&
|
|
rhs_triple_vendor != llvm::Triple::UnknownVendor)
|
|
return false;
|
|
}
|
|
|
|
const llvm::Triple::OSType lhs_triple_os = lhs_triple.getOS();
|
|
const llvm::Triple::OSType rhs_triple_os = rhs_triple.getOS();
|
|
if (lhs_triple_os != rhs_triple_os)
|
|
{
|
|
if (exact_match)
|
|
{
|
|
const bool rhs_os_specified = rhs.TripleOSWasSpecified();
|
|
const bool lhs_os_specified = TripleOSWasSpecified();
|
|
// Both architectures had the OS specified, so if they aren't
|
|
// equal then we return false
|
|
if (rhs_os_specified && lhs_os_specified)
|
|
return false;
|
|
}
|
|
// Only fail if both os types are not unknown
|
|
if (lhs_triple_os != llvm::Triple::UnknownOS &&
|
|
rhs_triple_os != llvm::Triple::UnknownOS)
|
|
return false;
|
|
}
|
|
|
|
const llvm::Triple::EnvironmentType lhs_triple_env = lhs_triple.getEnvironment();
|
|
const llvm::Triple::EnvironmentType rhs_triple_env = rhs_triple.getEnvironment();
|
|
|
|
if (lhs_triple_env != rhs_triple_env)
|
|
{
|
|
// Only fail if both environment types are not unknown
|
|
if (lhs_triple_env != llvm::Triple::UnknownEnvironment &&
|
|
rhs_triple_env != llvm::Triple::UnknownEnvironment)
|
|
return false;
|
|
}
|
|
return true;
|
|
}
|
|
return false;
|
|
}
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
// Helper methods.
|
|
|
|
void
|
|
ArchSpec::CoreUpdated (bool update_triple)
|
|
{
|
|
const CoreDefinition *core_def = FindCoreDefinition (m_core);
|
|
if (core_def)
|
|
{
|
|
if (update_triple)
|
|
m_triple = llvm::Triple(core_def->name, "unknown", "unknown");
|
|
m_byte_order = core_def->default_byte_order;
|
|
}
|
|
else
|
|
{
|
|
if (update_triple)
|
|
m_triple = llvm::Triple();
|
|
m_byte_order = eByteOrderInvalid;
|
|
}
|
|
}
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
// Operators.
|
|
|
|
static bool
|
|
cores_match (const ArchSpec::Core core1, const ArchSpec::Core core2, bool try_inverse, bool enforce_exact_match)
|
|
{
|
|
if (core1 == core2)
|
|
return true;
|
|
|
|
switch (core1)
|
|
{
|
|
case ArchSpec::kCore_any:
|
|
return true;
|
|
|
|
case ArchSpec::kCore_arm_any:
|
|
if (core2 >= ArchSpec::kCore_arm_first && core2 <= ArchSpec::kCore_arm_last)
|
|
return true;
|
|
if (core2 >= ArchSpec::kCore_thumb_first && core2 <= ArchSpec::kCore_thumb_last)
|
|
return true;
|
|
if (core2 == ArchSpec::kCore_arm_any)
|
|
return true;
|
|
break;
|
|
|
|
case ArchSpec::kCore_x86_32_any:
|
|
if ((core2 >= ArchSpec::kCore_x86_32_first && core2 <= ArchSpec::kCore_x86_32_last) || (core2 == ArchSpec::kCore_x86_32_any))
|
|
return true;
|
|
break;
|
|
|
|
case ArchSpec::kCore_ppc_any:
|
|
if ((core2 >= ArchSpec::kCore_ppc_first && core2 <= ArchSpec::kCore_ppc_last) || (core2 == ArchSpec::kCore_ppc_any))
|
|
return true;
|
|
break;
|
|
|
|
case ArchSpec::kCore_ppc64_any:
|
|
if ((core2 >= ArchSpec::kCore_ppc64_first && core2 <= ArchSpec::kCore_ppc64_last) || (core2 == ArchSpec::kCore_ppc64_any))
|
|
return true;
|
|
break;
|
|
|
|
case ArchSpec::eCore_arm_armv7f:
|
|
case ArchSpec::eCore_arm_armv7k:
|
|
case ArchSpec::eCore_arm_armv7s:
|
|
if (!enforce_exact_match)
|
|
{
|
|
try_inverse = false;
|
|
if (core2 == ArchSpec::eCore_arm_armv7)
|
|
return true;
|
|
}
|
|
break;
|
|
|
|
default:
|
|
break;
|
|
}
|
|
if (try_inverse)
|
|
return cores_match (core2, core1, false, enforce_exact_match);
|
|
return false;
|
|
}
|
|
|
|
bool
|
|
lldb_private::operator<(const ArchSpec& lhs, const ArchSpec& rhs)
|
|
{
|
|
const ArchSpec::Core lhs_core = lhs.GetCore ();
|
|
const ArchSpec::Core rhs_core = rhs.GetCore ();
|
|
return lhs_core < rhs_core;
|
|
}
|