Ayke van Laethem 44ee9864a4

[AVR][NFC] Make atomics tests easier to read ...

Use the same mnemonics in the tests that are used in the AtomicLoadOp
pattern ($rd, $rr) but use RR1 instead of $operand. This matches similar
tests in load8.ll.

Differential Revision: https://reviews.llvm.org/D117991

2022-02-02 09:10:39 +01:00

..

atomics

[AVR][NFC] Make atomics tests easier to read

2022-02-02 09:10:39 +01:00

calling-conv/c

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features

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inline-asm

[Tests] Add elementtype attribute to indirect inline asm operands (NFC)

2022-01-06 14:23:51 +01:00

integration

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intrinsics

[AVR] Only support sp, r0 and r1 in llvm.read_register

2021-07-24 14:03:27 +02:00

pseudo

[AVR] Fix lifeness issues in the AVR backend

2021-03-04 14:04:39 +01:00

relax-mem

[AVR] Fix def state of operands

2021-03-03 15:36:05 +01:00

add.ll

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alloca.ll

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and.ll

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avr-rust-issue-123.ll

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block-address-is-in-progmem-space.ll

Place the BlockAddress type in the address space of the containing function

2021-07-02 12:17:55 +01:00

branch-relaxation-long.ll

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branch-relaxation.ll

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brind.ll

Place the BlockAddress type in the address space of the containing function

2021-07-02 12:17:55 +01:00

call.ll

[AVR] Do not chain stores in call frame setup

2021-07-24 14:03:26 +02:00

clear-bss.ll

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cmp.ll

[AVR] Optimize 16-bit comparison with constant

2021-01-24 00:38:57 +08:00

com.ll

[update_llc_test_checks] Support AVR

2021-01-26 17:50:56 +08:00

copy-data-to-ram.ll

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ctlz.ll

[AVR] Optimize 8-bit logic left/right shifts

2021-01-23 23:54:16 +08:00

ctors.ll

[AVR] emit 'MCSA_Global' references to '__do_global_ctors' and '__do_global_dtors'

2021-08-05 10:37:36 +08:00

ctpop.ll

[TwoAddressInstructionPass] Improve the SrcRegMap and DstRegMap computation

2021-10-11 15:28:31 -07:00

cttz.ll

[AVR] Optimize 8-bit logic left/right shifts

2021-01-23 23:54:16 +08:00

directmem.ll

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div.ll

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dynalloca.ll

[AVR] Remove redundant dynalloca SP save/restore pass

2022-01-19 14:22:13 +01:00

elpm.ll

[AVR] Generate ELPM for loading byte/word from extended program memory

2022-01-20 02:53:10 +00:00

eor.ll

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expand-integer-failure.ll

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frame.ll

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frmidx-iterator-bug.ll

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hardware-mul.ll

[TwoAddressInstructionPass] Improve the SrcRegMap and DstRegMap computation

2021-10-11 15:28:31 -07:00

high-pressure-on-ptrregs.ll

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icall-func-pointer-correct-addr-space.ll

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impossible-reg-to-reg-copy.ll

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interrupts.ll

[AVR] Do not clear r0 at interrupt entry

2022-01-19 14:22:13 +01:00

io.ll

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issue-cannot-select-bswap.ll

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issue-regalloc-stackframe-folding-earlyclobber.ll

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jmp-long.ll

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large-return-size.ll

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lit.local.cfg

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load.ll

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lower-formal-args-struct-return.ll

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lower-formal-arguments-assertion.ll

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lpmx.ll

[AVR] Remove regalloc workaround for LDDWRdPtrQ

2022-01-23 17:08:00 +01:00

neg.ll

[AVR] Fix expansion of NEGW

2021-03-03 15:36:05 +01:00

no-print-operand-twice.ll

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or.ll

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PR31344.ll

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PR31345.ll

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PR37143.ll

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pre-schedule.ll

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progmem-extended.ll

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progmem.ll

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rem.ll

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return.ll

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rot.ll

[AVR] Fix rotate instructions

2021-07-24 14:03:26 +02:00

runtime-trig.ll

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rust-avr-bug-37.ll

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rust-avr-bug-95.ll

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rust-avr-bug-99.ll

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rust-avr-bug-112.ll

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rust-trait-object.ll

[AVR] Fix global references to function symbols

2021-02-10 00:40:49 +13:00

sections.ll

[AVR][MC] Generate section '.progmemX.data' for extended flash banks

2022-01-20 02:53:10 +00:00

select-must-add-unconditional-jump.ll

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sext.ll

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shift-expand.ll

[AVR] Expand large shifts early in IR

2021-07-24 14:03:26 +02:00

shift.ll

[AVR] Optimize int16 shift operation for shift amount greater than 8

2022-01-04 11:48:50 +00:00

sign-extension.ll

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smul-with-overflow.ll

[AVR] Make use of the constant value 0 in R1

2022-01-23 17:08:01 +01:00

software-mul.ll

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std-ldd-immediate-overflow.ll

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store-undef.ll

[AVR] Make use of the constant value 0 in R1

2022-01-23 17:08:01 +01:00

store.ll

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struct.ll

[AVR][test] Add a new test: functions with struct return type

2021-06-28 21:19:26 +08:00

sub.ll

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trunc.ll

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umul-with-overflow.ll

[AVR] Make use of the constant value 0 in R1

2022-01-23 17:08:01 +01:00

umul.with.overflow.i16-bug.ll

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unaligned-atomic-loads.ll

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varargs.ll

[AVR] Do not chain stores in call frame setup

2021-07-24 14:03:26 +02:00

xor.ll

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zext.ll

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