e2935dcfc4
This adds an Mask ArrayRef to getShuffleCost, so that if an exact mask can be provided a more accurate cost can be provided by the backend. For example VREV costs could be returned by the ARM backend. This should be an NFC until then, laying the groundwork for that to be added. Differential Revision: https://reviews.llvm.org/D98206
123 lines
5.0 KiB
C++
123 lines
5.0 KiB
C++
//===-- SystemZTargetTransformInfo.h - SystemZ-specific TTI ---------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZTARGETTRANSFORMINFO_H
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#define LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZTARGETTRANSFORMINFO_H
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#include "SystemZTargetMachine.h"
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#include "llvm/Analysis/TargetTransformInfo.h"
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#include "llvm/CodeGen/BasicTTIImpl.h"
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namespace llvm {
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class SystemZTTIImpl : public BasicTTIImplBase<SystemZTTIImpl> {
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typedef BasicTTIImplBase<SystemZTTIImpl> BaseT;
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typedef TargetTransformInfo TTI;
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friend BaseT;
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const SystemZSubtarget *ST;
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const SystemZTargetLowering *TLI;
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const SystemZSubtarget *getST() const { return ST; }
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const SystemZTargetLowering *getTLI() const { return TLI; }
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unsigned const LIBCALL_COST = 30;
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public:
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explicit SystemZTTIImpl(const SystemZTargetMachine *TM, const Function &F)
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: BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
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TLI(ST->getTargetLowering()) {}
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/// \name Scalar TTI Implementations
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/// @{
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unsigned getInliningThresholdMultiplier() { return 3; }
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int getIntImmCost(const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind);
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int getIntImmCostInst(unsigned Opcode, unsigned Idx, const APInt &Imm,
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Type *Ty, TTI::TargetCostKind CostKind,
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Instruction *Inst = nullptr);
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int getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx, const APInt &Imm,
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Type *Ty, TTI::TargetCostKind CostKind);
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TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth);
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void getUnrollingPreferences(Loop *L, ScalarEvolution &SE,
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TTI::UnrollingPreferences &UP);
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void getPeelingPreferences(Loop *L, ScalarEvolution &SE,
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TTI::PeelingPreferences &PP);
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bool isLSRCostLess(TargetTransformInfo::LSRCost &C1,
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TargetTransformInfo::LSRCost &C2);
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/// @}
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/// \name Vector TTI Implementations
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/// @{
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unsigned getNumberOfRegisters(unsigned ClassID) const;
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unsigned getRegisterBitWidth(bool Vector) const;
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unsigned getCacheLineSize() const override { return 256; }
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unsigned getPrefetchDistance() const override { return 4500; }
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unsigned getMinPrefetchStride(unsigned NumMemAccesses,
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unsigned NumStridedMemAccesses,
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unsigned NumPrefetches,
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bool HasCall) const override;
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bool enableWritePrefetching() const override { return true; }
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bool hasDivRemOp(Type *DataType, bool IsSigned);
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bool prefersVectorizedAddressing() { return false; }
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bool LSRWithInstrQueries() { return true; }
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bool supportsEfficientVectorElementLoadStore() { return true; }
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bool enableInterleavedAccessVectorization() { return true; }
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int getArithmeticInstrCost(
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unsigned Opcode, Type *Ty,
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TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput,
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TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue,
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TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue,
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TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None,
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TTI::OperandValueProperties Opd2PropInfo = TTI::OP_None,
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ArrayRef<const Value *> Args = ArrayRef<const Value *>(),
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const Instruction *CxtI = nullptr);
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int getShuffleCost(TTI::ShuffleKind Kind, VectorType *Tp, ArrayRef<int> Mask,
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int Index, VectorType *SubTp);
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unsigned getVectorTruncCost(Type *SrcTy, Type *DstTy);
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unsigned getVectorBitmaskConversionCost(Type *SrcTy, Type *DstTy);
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unsigned getBoolVecToIntConversionCost(unsigned Opcode, Type *Dst,
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const Instruction *I);
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int getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
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TTI::CastContextHint CCH, TTI::TargetCostKind CostKind,
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const Instruction *I = nullptr);
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int getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy,
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CmpInst::Predicate VecPred,
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TTI::TargetCostKind CostKind,
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const Instruction *I = nullptr);
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int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index);
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bool isFoldableLoad(const LoadInst *Ld, const Instruction *&FoldedValue);
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int getMemoryOpCost(unsigned Opcode, Type *Src, MaybeAlign Alignment,
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unsigned AddressSpace, TTI::TargetCostKind CostKind,
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const Instruction *I = nullptr);
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int getInterleavedMemoryOpCost(
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unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
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Align Alignment, unsigned AddressSpace,
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TTI::TargetCostKind CostKind = TTI::TCK_SizeAndLatency,
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bool UseMaskForCond = false, bool UseMaskForGaps = false);
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int getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
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TTI::TargetCostKind CostKind);
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/// @}
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};
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} // end namespace llvm
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#endif
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