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llvm-project/llvm/lib/Target/AMDGPU
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Matt Arsenault fb67164ebc AMDGPU/GlobalISel: Legalize more fp<->int conversions 
llvm-svn: 351767
2019-01-22 00:20:17 +00:00
..
AsmParser
Update the file headers across all of the LLVM projects in the monorepo
2019-01-19 08:50:56 +00:00
Disassembler
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InstPrinter
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MCTargetDesc
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TargetInfo
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Utils
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AMDGPU.h
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AMDGPU.td
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AMDGPUAliasAnalysis.cpp
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AMDGPUAliasAnalysis.h
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AMDGPUAlwaysInlinePass.cpp
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AMDGPUAnnotateKernelFeatures.cpp
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AMDGPUAnnotateUniformValues.cpp
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AMDGPUArgumentUsageInfo.cpp
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AMDGPUArgumentUsageInfo.h
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AMDGPUAsmPrinter.cpp
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AMDGPUAsmPrinter.h
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AMDGPUAtomicOptimizer.cpp
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AMDGPUCallingConv.td
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AMDGPUCallLowering.cpp
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AMDGPUCallLowering.h
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AMDGPUCodeGenPrepare.cpp
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AMDGPUFeatures.td
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AMDGPUFixFunctionBitcasts.cpp
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AMDGPUFrameLowering.cpp
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AMDGPUFrameLowering.h
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AMDGPUGenRegisterBankInfo.def
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AMDGPUGISel.td
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AMDGPUHSAMetadataStreamer.cpp
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AMDGPUHSAMetadataStreamer.h
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AMDGPUInline.cpp
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AMDGPUInstrInfo.cpp
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AMDGPUInstrInfo.h
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AMDGPUInstrInfo.td
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AMDGPUInstructions.td
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AMDGPUInstructionSelector.cpp
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AMDGPUInstructionSelector.h
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AMDGPUISelDAGToDAG.cpp
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AMDGPUISelLowering.cpp
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AMDGPUISelLowering.h
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2019-01-19 08:50:56 +00:00
AMDGPULegalizerInfo.cpp
AMDGPU/GlobalISel: Legalize more fp<->int conversions
2019-01-22 00:20:17 +00:00
AMDGPULegalizerInfo.h
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AMDGPULibCalls.cpp
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AMDGPULibFunc.cpp
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AMDGPULibFunc.h
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AMDGPULowerIntrinsics.cpp
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AMDGPULowerKernelArguments.cpp
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AMDGPULowerKernelAttributes.cpp
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AMDGPUMachineCFGStructurizer.cpp
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AMDGPUMachineFunction.cpp
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AMDGPUMachineFunction.h
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AMDGPUMachineModuleInfo.cpp
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AMDGPUMachineModuleInfo.h
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AMDGPUMacroFusion.cpp
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AMDGPUMacroFusion.h
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AMDGPUMCInstLower.cpp
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AMDGPUOpenCLEnqueuedBlockLowering.cpp
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AMDGPUPerfHintAnalysis.cpp
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AMDGPUPerfHintAnalysis.h
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AMDGPUPromoteAlloca.cpp
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AMDGPUPTNote.h
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AMDGPURegAsmNames.inc.cpp
AMDGPU: Work around build special casing .inc files
2017-06-08 19:25:21 +00:00
AMDGPURegisterBankInfo.cpp
AMDGPU/GlobalISel: Regbank select for fpext
2019-01-20 18:35:41 +00:00
AMDGPURegisterBankInfo.h
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AMDGPURegisterBanks.td
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AMDGPURegisterInfo.cpp
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AMDGPURegisterInfo.h
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AMDGPURegisterInfo.td
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AMDGPURewriteOutArguments.cpp
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AMDGPUSearchableTables.td
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AMDGPUSubtarget.cpp
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AMDGPUSubtarget.h
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AMDGPUTargetMachine.cpp
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AMDGPUTargetMachine.h
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AMDGPUTargetObjectFile.cpp
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AMDGPUTargetObjectFile.h
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AMDGPUTargetTransformInfo.cpp
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AMDGPUTargetTransformInfo.h
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AMDGPUUnifyDivergentExitNodes.cpp
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AMDGPUUnifyMetadata.cpp
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AMDILCFGStructurizer.cpp
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AMDKernelCodeT.h
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BUFInstructions.td
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CaymanInstructions.td
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2019-01-19 08:50:56 +00:00
CMakeLists.txt
AMDGPU: Remove llvm.SI.load.const
2019-01-18 20:27:02 +00:00
DSInstructions.td
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EvergreenInstructions.td
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FLATInstructions.td
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GCNDPPCombine.cpp
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GCNHazardRecognizer.cpp
[AMDGPU] Fixed hazard recognizer to walk predecessors
2019-01-21 19:11:26 +00:00
GCNHazardRecognizer.h
[AMDGPU] Fixed hazard recognizer to walk predecessors
2019-01-21 19:11:26 +00:00
GCNILPSched.cpp
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GCNIterativeScheduler.cpp
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GCNIterativeScheduler.h
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GCNMinRegStrategy.cpp
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GCNProcessors.td
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GCNRegPressure.cpp
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GCNRegPressure.h
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GCNSchedStrategy.cpp
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GCNSchedStrategy.h
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LLVMBuild.txt
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MIMGInstructions.td
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R600.td
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R600AsmPrinter.cpp
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R600AsmPrinter.h
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R600ClauseMergePass.cpp
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R600ControlFlowFinalizer.cpp
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R600Defines.h
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R600EmitClauseMarkers.cpp
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R600ExpandSpecialInstrs.cpp
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R600FrameLowering.cpp
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R600FrameLowering.h
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R600InstrFormats.td
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R600InstrInfo.cpp
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R600InstrInfo.h
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R600Instructions.td
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R600ISelLowering.cpp
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R600ISelLowering.h
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R600MachineFunctionInfo.cpp
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R600MachineFunctionInfo.h
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R600MachineScheduler.cpp
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R600MachineScheduler.h
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R600OpenCLImageTypeLoweringPass.cpp
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R600OptimizeVectorRegisters.cpp
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R600Packetizer.cpp
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R600Processors.td
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R600RegisterInfo.cpp
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R600RegisterInfo.h
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R600RegisterInfo.td
AMDGPU: Separate R600 and GCN TableGen files
2018-06-28 23:47:12 +00:00
R600Schedule.td
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R700Instructions.td
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SIAddIMGInit.cpp
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SIAnnotateControlFlow.cpp
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SIDebuggerInsertNops.cpp
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SIDefines.h
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SIFixSGPRCopies.cpp
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SIFixupVectorISel.cpp
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SIFixVGPRCopies.cpp
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SIFixWWMLiveness.cpp
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SIFoldOperands.cpp
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SIFormMemoryClauses.cpp
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SIFrameLowering.cpp
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SIFrameLowering.h
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SIInsertSkips.cpp
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SIInsertWaitcnts.cpp
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SIInstrFormats.td
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SIInstrInfo.cpp
[AMDGPU] Fixed hazard recognizer to walk predecessors
2019-01-21 19:11:26 +00:00
SIInstrInfo.h
[AMDGPU] Fixed hazard recognizer to walk predecessors
2019-01-21 19:11:26 +00:00
SIInstrInfo.td
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SIInstructions.td
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SIISelLowering.cpp
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SIISelLowering.h
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SILoadStoreOptimizer.cpp
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SILowerControlFlow.cpp
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SILowerI1Copies.cpp
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SIMachineFunctionInfo.cpp
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SIMachineFunctionInfo.h
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SIMachineScheduler.cpp
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SIMachineScheduler.h
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SIMemoryLegalizer.cpp
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SIModeRegister.cpp
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SIOptimizeExecMasking.cpp
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SIOptimizeExecMaskingPreRA.cpp
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SIPeepholeSDWA.cpp
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SIProgramInfo.h
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SIRegisterInfo.cpp
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SIRegisterInfo.h
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SIRegisterInfo.td
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SISchedule.td
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SIShrinkInstructions.cpp
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SIWholeQuadMode.cpp
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SMInstructions.td
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SOPInstructions.td
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VIInstrFormats.td
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VIInstructions.td
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VOP1Instructions.td
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VOP2Instructions.td
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VOP3Instructions.td
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VOP3PInstructions.td
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VOPCInstructions.td
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VOPInstructions.td
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