2946cd7010
to reflect the new license. We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach. Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository. llvm-svn: 351636
190 lines
8.0 KiB
TableGen
190 lines
8.0 KiB
TableGen
//===- WebAssemblyInstrControl.td-WebAssembly control-flow ------*- tablegen -*-
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// WebAssembly control-flow code-gen constructs.
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///
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//===----------------------------------------------------------------------===//
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let isBranch = 1, isTerminator = 1, hasCtrlDep = 1 in {
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// The condition operand is a boolean value which WebAssembly represents as i32.
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defm BR_IF : I<(outs), (ins bb_op:$dst, I32:$cond),
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(outs), (ins bb_op:$dst),
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[(brcond I32:$cond, bb:$dst)],
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"br_if \t$dst, $cond", "br_if \t$dst", 0x0d>;
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let isCodeGenOnly = 1 in
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defm BR_UNLESS : I<(outs), (ins bb_op:$dst, I32:$cond),
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(outs), (ins bb_op:$dst), []>;
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let isBarrier = 1 in {
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defm BR : NRI<(outs), (ins bb_op:$dst),
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[(br bb:$dst)],
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"br \t$dst", 0x0c>;
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} // isBarrier = 1
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} // isBranch = 1, isTerminator = 1, hasCtrlDep = 1
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def : Pat<(brcond (i32 (setne I32:$cond, 0)), bb:$dst),
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(BR_IF bb_op:$dst, I32:$cond)>;
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def : Pat<(brcond (i32 (seteq I32:$cond, 0)), bb:$dst),
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(BR_UNLESS bb_op:$dst, I32:$cond)>;
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// A list of branch targets enclosed in {} and separated by comma.
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// Used by br_table only.
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def BrListAsmOperand : AsmOperandClass { let Name = "BrList"; }
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let OperandNamespace = "WebAssembly" in {
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let OperandType = "OPERAND_BRLIST" in {
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def brlist : Operand<i32> {
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let ParserMatchClass = BrListAsmOperand;
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let PrintMethod = "printBrList";
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}
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} // OPERAND_BRLIST
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} // OperandNamespace = "WebAssembly"
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// TODO: SelectionDAG's lowering insists on using a pointer as the index for
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// jump tables, so in practice we don't ever use BR_TABLE_I64 in wasm32 mode
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// currently.
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let isTerminator = 1, hasCtrlDep = 1, isBarrier = 1 in {
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defm BR_TABLE_I32 : I<(outs), (ins I32:$index, variable_ops),
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(outs), (ins brlist:$brl),
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[(WebAssemblybr_table I32:$index)],
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"br_table \t$index", "br_table \t$brl",
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0x0e>;
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defm BR_TABLE_I64 : I<(outs), (ins I64:$index, variable_ops),
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(outs), (ins brlist:$brl),
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[(WebAssemblybr_table I64:$index)],
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"br_table \t$index", "br_table \t$brl",
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0x0e>;
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} // isTerminator = 1, hasCtrlDep = 1, isBarrier = 1
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// This is technically a control-flow instruction, since all it affects is the
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// IP.
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defm NOP : NRI<(outs), (ins), [], "nop", 0x01>;
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// Placemarkers to indicate the start or end of a block or loop scope.
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// These use/clobber VALUE_STACK to prevent them from being moved into the
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// middle of an expression tree.
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let Uses = [VALUE_STACK], Defs = [VALUE_STACK] in {
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defm BLOCK : NRI<(outs), (ins Signature:$sig), [], "block \t$sig", 0x02>;
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defm LOOP : NRI<(outs), (ins Signature:$sig), [], "loop \t$sig", 0x03>;
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defm IF : I<(outs), (ins Signature:$sig, I32:$cond),
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(outs), (ins Signature:$sig),
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[], "if \t$sig, $cond", "if \t$sig", 0x04>;
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defm ELSE : NRI<(outs), (ins), [], "else", 0x05>;
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// END_BLOCK, END_LOOP, END_IF and END_FUNCTION are represented with the same
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// opcode in wasm.
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defm END_BLOCK : NRI<(outs), (ins), [], "end_block", 0x0b>;
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defm END_LOOP : NRI<(outs), (ins), [], "end_loop", 0x0b>;
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defm END_IF : NRI<(outs), (ins), [], "end_if", 0x0b>;
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let isTerminator = 1, isBarrier = 1 in
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defm END_FUNCTION : NRI<(outs), (ins), [], "end_function", 0x0b>;
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} // Uses = [VALUE_STACK], Defs = [VALUE_STACK]
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multiclass RETURN<WebAssemblyRegClass vt> {
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defm RETURN_#vt : I<(outs), (ins vt:$val), (outs), (ins),
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[(WebAssemblyreturn vt:$val)],
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"return \t$val", "return", 0x0f>;
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// Equivalent to RETURN_#vt, for use at the end of a function when wasm
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// semantics return by falling off the end of the block.
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let isCodeGenOnly = 1 in
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defm FALLTHROUGH_RETURN_#vt : I<(outs), (ins vt:$val), (outs), (ins), []>;
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}
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multiclass SIMD_RETURN<ValueType vt> {
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defm RETURN_#vt : I<(outs), (ins V128:$val), (outs), (ins),
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[(WebAssemblyreturn (vt V128:$val))],
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"return \t$val", "return", 0x0f>,
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Requires<[HasSIMD128]>;
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// Equivalent to RETURN_#vt, for use at the end of a function when wasm
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// semantics return by falling off the end of the block.
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let isCodeGenOnly = 1 in
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defm FALLTHROUGH_RETURN_#vt : I<(outs), (ins V128:$val), (outs), (ins),
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[]>,
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Requires<[HasSIMD128]>;
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}
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let isTerminator = 1, hasCtrlDep = 1, isBarrier = 1 in {
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let isReturn = 1 in {
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defm "": RETURN<I32>;
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defm "": RETURN<I64>;
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defm "": RETURN<F32>;
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defm "": RETURN<F64>;
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defm "": RETURN<EXCEPT_REF>;
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defm "": SIMD_RETURN<v16i8>;
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defm "": SIMD_RETURN<v8i16>;
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defm "": SIMD_RETURN<v4i32>;
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defm "": SIMD_RETURN<v2i64>;
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defm "": SIMD_RETURN<v4f32>;
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defm "": SIMD_RETURN<v2f64>;
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defm RETURN_VOID : NRI<(outs), (ins), [(WebAssemblyreturn)], "return", 0x0f>;
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// This is to RETURN_VOID what FALLTHROUGH_RETURN_#vt is to RETURN_#vt.
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let isCodeGenOnly = 1 in
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defm FALLTHROUGH_RETURN_VOID : NRI<(outs), (ins), []>;
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} // isReturn = 1
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defm UNREACHABLE : NRI<(outs), (ins), [(trap)], "unreachable", 0x00>;
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} // isTerminator = 1, hasCtrlDep = 1, isBarrier = 1
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//===----------------------------------------------------------------------===//
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// Exception handling instructions
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//===----------------------------------------------------------------------===//
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let Predicates = [HasExceptionHandling] in {
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// Throwing an exception: throw / rethrow
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let isTerminator = 1, hasCtrlDep = 1, isBarrier = 1 in {
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defm THROW_I32 : I<(outs), (ins event_op:$tag, I32:$val),
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(outs), (ins event_op:$tag),
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[(WebAssemblythrow (WebAssemblywrapper texternalsym:$tag),
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I32:$val)],
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"throw \t$tag, $val", "throw \t$tag",
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0x08>;
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defm THROW_I64 : I<(outs), (ins event_op:$tag, I64:$val),
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(outs), (ins event_op:$tag),
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[(WebAssemblythrow (WebAssemblywrapper texternalsym:$tag),
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I64:$val)],
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"throw \t$tag, $val", "throw \t$tag",
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0x08>;
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defm RETHROW : NRI<(outs), (ins bb_op:$dst), [], "rethrow \t$dst", 0x09>;
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let isCodeGenOnly = 1 in
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// This is used when the destination for rethrow is the caller function. This
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// will be converted to a rethrow in CFGStackify.
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defm RETHROW_TO_CALLER : NRI<(outs), (ins), [], "rethrow">;
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} // isTerminator = 1, hasCtrlDep = 1, isBarrier = 1
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// Region within which an exception is caught: try / end_try
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let Uses = [VALUE_STACK], Defs = [VALUE_STACK] in {
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defm TRY : NRI<(outs), (ins Signature:$sig), [], "try \t$sig", 0x06>;
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defm END_TRY : NRI<(outs), (ins), [], "end_try", 0x0b>;
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} // Uses = [VALUE_STACK], Defs = [VALUE_STACK]
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// Catching an exception: catch / catch_all
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let hasCtrlDep = 1, hasSideEffects = 1 in {
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defm CATCH_I32 : I<(outs I32:$dst), (ins i32imm:$tag),
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(outs), (ins i32imm:$tag),
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[(set I32:$dst, (int_wasm_catch imm:$tag))],
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"i32.catch \t$dst, $tag", "i32.catch \t$tag", 0x07>;
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defm CATCH_I64 : I<(outs I64:$dst), (ins i32imm:$tag),
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(outs), (ins i32imm:$tag),
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[(set I64:$dst, (int_wasm_catch imm:$tag))],
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"i64.catch \t$dst, $tag", "i64.catch \t$tag", 0x07>;
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defm CATCH_ALL : NRI<(outs), (ins), [], "catch_all", 0x05>;
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}
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// Pseudo instructions: cleanupret / catchret
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let isTerminator = 1, hasSideEffects = 1, isBarrier = 1, hasCtrlDep = 1,
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isCodeGenOnly = 1, isEHScopeReturn = 1 in {
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defm CLEANUPRET : NRI<(outs), (ins), [(cleanupret)], "", 0>;
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defm CATCHRET : NRI<(outs), (ins bb_op:$dst, bb_op:$from),
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[(catchret bb:$dst, bb:$from)], "", 0>;
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}
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}
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