[RISCV][ISel] Combine vector fadd/fsub/fmul with fp extend. (#81248)
Extend D133739 and #76785 to support vector widening floating-point
add/sub/mul instructions.
Specifically, this patch works for the below optimization case:
### Source code
```
define void @vfwmul_v2f32_multiple_users(ptr %x, ptr %y, ptr %z, <2 x float> %a, <2 x float> %b, <2 x float> %b2) {
%c = fpext <2 x float> %a to <2 x double>
%d = fpext <2 x float> %b to <2 x double>
%d2 = fpext <2 x float> %b2 to <2 x double>
%e = fmul <2 x double> %c, %d
%f = fadd <2 x double> %c, %d2
%g = fsub <2 x double> %d, %d2
store <2 x double> %e, ptr %x
store <2 x double> %f, ptr %y
store <2 x double> %g, ptr %z
ret void
}
```
### Before this patch
[Compiler Explorer](https://godbolt.org/z/aaEMs5s9h)
```
vfwmul_v2f32_multiple_users:
vsetivli zero, 2, e32, mf2, ta, ma
vfwcvt.f.f.v v11, v8
vfwcvt.f.f.v v8, v9
vfwcvt.f.f.v v9, v10
vsetvli zero, zero, e64, m1, ta, ma
vfmul.vv v10, v11, v8
vfadd.vv v11, v11, v9
vfsub.vv v8, v8, v9
vse64.v v10, (a0)
vse64.v v11, (a1)
vse64.v v8, (a2)
ret
```
### After this patch
```
vfwmul_v2f32_multiple_users:
vsetivli zero, 2, e32, mf2, ta, ma
vfwmul.vv v11, v8, v9
vfwadd.vv v12, v8, v10
vfwsub.vv v8, v9, v10
vse64.v v11, (a0)
vse64.v v12, (a1)
vse64.v v8, (a2)
```
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