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llvm-project/llvm/test/CodeGen
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rkorsa c680fb69d6 [AMDGPU] Fixes in ISelDAG path and GlobalISel path for 'bias' operand with A16 bit on 
The LOD bias operand is of type 'half' when the A16-bit is ON' for MIMG instructions.
'bias' is only 16-bit but occupies 32-bits with upper 16-bits containing junk.
The patch fixes both the paths(ISelDAG and GlobalISel) for proper encoding of LOD bias operand.

Differential Revision: https://reviews.llvm.org/D111754
2021-12-17 16:11:51 +05:30
..
AArch64
[NFC][regalloc] Introduce the RegAllocEvictionAdvisorAnalysis
2021-12-16 17:56:46 -08:00
AMDGPU
[AMDGPU] Fixes in ISelDAG path and GlobalISel path for 'bias' operand with A16 bit on
2021-12-17 16:11:51 +05:30
ARC
…
ARM
[ARM] Add AddrModeT2_i8neg addressing mode support for frame lowering.
2021-12-14 12:49:27 +00:00
AVR
[asm] Remove explicit branch for modifier 'l'
2021-11-19 09:19:53 -05:00
BPF
BPF: Workaround InstCombine trunc+icmp => mask+icmp Optimization
2021-11-18 20:25:28 -08:00
CSKY
[CSKY] Complete codegen of basic arithmetic and load/store operations
2021-12-09 11:40:20 +08:00
Generic
[NFC][regalloc] Introduce the RegAllocEvictionAdvisorAnalysis
2021-12-16 17:56:46 -08:00
Hexagon
Reapply [xray] add support for hexagon
2021-12-10 05:32:28 -08:00
Inputs
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Lanai
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M68k
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Mips
[MIPS] Allow i1 values for 'r' constraint in inline-asm
2021-12-14 01:19:34 +03:00
MIR
AMDGPU: Enable fixed function ABI by default
2021-12-04 10:49:18 -05:00
MLRegalloc
[NFC][regalloc] Introduce the RegAllocEvictionAdvisorAnalysis
2021-12-16 17:56:46 -08:00
MSP430
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NVPTX
[NVPTX] Auto-generate tests for sufrace and texture instructions
2021-12-07 15:27:51 +03:00
PowerPC
[NFC][regalloc] Introduce the RegAllocEvictionAdvisorAnalysis
2021-12-16 17:56:46 -08:00
RISCV
[RISCV] Revert Zfhmin related changes that aren't tested and depend on f16 being a legal type.
2021-12-16 08:55:28 -08:00
SPARC
[SPARC] Zero-extend the operands when doing UMULO on 64-bit integers
2021-11-14 19:59:52 +01:00
SystemZ
[z/OS] Implement prologue and epilogue generation for z/OS target.
2021-12-16 09:04:05 -05:00
Thumb
[clang][ARM] PACBTI-M assembly support
2021-11-30 09:28:18 +00:00
Thumb2
[ARM] Handle splats of constants for MVE qr instruction
2021-12-17 09:16:28 +00:00
VE
[VE] SHL,SRA,SRL v256i32|64 isel and tests
2021-12-15 11:32:18 +01:00
WebAssembly
[WebAssembly] Add simd-vector-trunc.ll test missing from 2a4a229
2021-12-15 09:22:40 -08:00
WinCFGuard
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WinEH
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X86
[NFC][regalloc] Introduce the RegAllocEvictionAdvisorAnalysis
2021-12-16 17:56:46 -08:00
XCore
…